mvme5500/include/bsp.h

0001 /**
0002  * @file
0003  *
0004  * @ingroup RTEMSBSPsPowerPCMVME5500
0005  *
0006  * @brief Global BSP definitions.
0007  */
0008
0009 /*
0010  *  Copyright (C) 1999 Eric Valette. valette@crf.canon.fr
0011  *
0012  *  The license and distribution terms for this file may be
0013  *  found in the file LICENSE in this distribution or at
0014  *  http://www.rtems.org/license/LICENSE.
0015  *
0016  *  (C) S. Kate Feng 2003-2007 : Modified it to support the mvme5500 BSP.
0017  */
0018
0019 #ifndef LIBBSP_POWERPC_MVME5500_BSP_H
0020 #define LIBBSP_POWERPC_MVME5500_BSP_H
0021
0022 /**
0023  * @defgroup RTEMSBSPsPowerPCMVME5500 MVME5500
0024  *
0025  * @ingroup RTEMSBSPsPowerPC
0026  *
0027  * @brief MVME5500 Board Support Package.
0028  *
0029  * @{
0030  */
0031
0032 #ifndef ASM
0033
0034 #include <bspopts.h>
0035 #include <bsp/default-initial-extension.h>
0036
0037 #include <rtems.h>
0038 #include <libcpu/io.h>
0039 #include <bsp/vectors.h>
0040
0041 /* Board type */
0042 typedef enum {
0043   undefined = 0,
0044   MVME5500,
0045   MVME6100
0046 } BSP_BoardTypes;
0047
0048 BSP_BoardTypes BSP_getBoardType(void);
0049
0050 /* Board type */
0051 typedef enum {
0052   Undefined,
0053   UNIVERSE2,
0054   TSI148,
0055 } BSP_VMEchipTypes;
0056
0057 BSP_VMEchipTypes BSP_getVMEchipType(void);
0058
0059 /* The version of Discovery system controller */
0060
0061 typedef enum {
0062   notdefined,
0063   GT64260A,
0064   GT64260B,
0065   MV64360,
0066 } DiscoveryChipVersion;
0067
0068 DiscoveryChipVersion BSP_getDiscoveryChipVersion(void);
0069
0070 #define _256M           0x10000000
0071 #define _512M           0x20000000
0072
0073 #define GT64x60_REG_BASE        0xf1000000  /* Base of GT64260 Reg Space */
0074 #define GT64x60_REG_SPACE_SIZE  0x10000     /* 64Kb Internal Reg Space */
0075
0076 #define GT64x60_DEV1_BASE       0xf1100000  /* Device bank1(chip select 1) base
0077                                              */
0078 #define GT64260_DEV1_SIZE       0x00100000 /* Device bank size */
0079
0080 /* fundamental addresses for this BSP (PREPxxx are from libcpu/io.h) */
0081 #define _IO_BASE GT64x60_REG_BASE
0082
0083 #define BSP_NVRAM_BASE_ADDR     0xf1110000
0084
0085 #define BSP_RTC_INTA_REG        0x7ff0
0086 #define BSP_RTC_SECOND          0x7ff2
0087 #define BSP_RTC_MINUTE          0x7ff3
0088 #define BSP_RTC_HOUR            0x7ff4
0089 #define BSP_RTC_DATE            0x7ff5
0090 #define BSP_RTC_INTERRUPTS      0x7ff6
0091 #define BSP_RTC_WATCHDOG        0x7ff7
0092
0093 /* PCI0 Domain I/O space */
0094 #define PCI0_IO_BASE            0xf0000000
0095 #define PCI1_IO_BASE            0xf0800000
0096
0097 /* PCI 0 memory space as seen from the CPU */
0098 #define PCI0_MEM_BASE                  0x80000000
0099 #define PCI_MEM_BASE                   0  /* glue for vmeUniverse */
0100 #define PCI_MEM_BASE_ADJUSTMENT        0
0101
0102 /* address of our ram on the PCI bus */
0103 #define  PCI_DRAM_OFFSET          0
0104
0105 /* PCI 1 memory space as seen from the CPU */
0106 #define PCI1_MEM_BASE           0xe0000000
0107 #define PCI1_MEM_SIZE           0x10000000
0108
0109 /* Needed for hot adding via PMCspan on the PCI0 local bus.
0110  * This is board dependent, only because mvme5500
0111  * supports hot adding and has more than one local PCI
0112  * bus.
0113  */
0114 #define BSP_MAX_PCI_BUS_ON_PCI0 8
0115 #define BSP_MAX_PCI_BUS_ON_PCI1 2
0116 #define BSP_MAX_PCI_BUS  (BSP_MAX_PCI_BUS_ON_PCI0+BSP_MAX_PCI_BUS_ON_PCI1)
0117
0118
0119 /* The glues to Till's vmeUniverse, although the name does not
0120  * actually reflect the relevant architect of the MVME5500.
0121  */
0122 #define BSP_PCI_IRQ0 BSP_GPP_IRQ_LOWEST_OFFSET
0123
0124 /*
0125  *  confdefs.h overrides for this BSP:
0126  *   - Interrupt stack space is not minimum if defined.
0127  */
0128 #define BSP_INTERRUPT_STACK_SIZE  (16 * 1024) /* <skf> 2/09 wants it to be adjustable by BSP */
0129
0130 /* uart.c uses out_8 instead of outb  */
0131 #define BSP_UART_IOBASE_COM1  GT64x60_DEV1_BASE + 0x20000
0132 #define BSP_UART_IOBASE_COM2  GT64x60_DEV1_BASE + 0x21000
0133
0134 #define BSP_CONSOLE_PORT    BSP_UART_COM1  /* console */
0135 #define BSP_UART_BAUD_BASE    115200
0136
0137 /*
0138  * Total memory using RESIDUAL DATA
0139  */
0140 extern unsigned int BSP_mem_size;
0141 /*
0142  * PCI Bus Frequency
0143  */
0144 extern unsigned int BSP_bus_frequency;
0145 /*
0146  * processor clock frequency
0147  */
0148 extern unsigned int BSP_processor_frequency;
0149 /*
0150  * Time base divisior (how many tick for 1 second).
0151  */
0152 extern unsigned int BSP_time_base_divisor;
0153
0154 #define BSP_Convert_decrementer( _value ) \
0155   ((unsigned long long) ((((unsigned long long)BSP_time_base_divisor) * 1000000ULL) /((unsigned long long) BSP_bus_frequency)) * ((unsigned long long) (_value)))
0156
0157 /* extern int printk(const char *, ...) __attribute__((format(printf, 1, 2))); */
0158 extern int BSP_disconnect_clock_handler(void);
0159 extern int BSP_connect_clock_handler(void);
0160
0161 unsigned long _BSP_clear_hostbridge_errors(int enableMCP, int quiet);
0162
0163 /*
0164  * Prototypes for methods called only from .S for dependency tracking
0165  */
0166 char *save_boot_params(
0167   void *r3,
0168   void *r4,
0169   void *r5,
0170   char *cmdline_start,
0171   char *cmdline_end
0172 );
0173 void zero_bss(void);
0174
0175 /*
0176  * Prototypes for methods in the BSP that cross file boundaries
0177  */
0178 uint32_t probeMemoryEnd(void);
0179 void     pci_interface(void);
0180 void     BSP_printPicIsrTbl(void);
0181 int I2Cread_eeprom(
0182   unsigned char  I2cBusAddr,
0183   uint32_t       devA2A1A0,
0184   uint32_t       AddrBytes,
0185   unsigned char *pBuff,
0186   uint32_t       numBytes
0187 );
0188
0189 #if 0
0190 #define RTEMS_BSP_NETWORK_DRIVER_NAME  "gt1"
0191 #define RTEMS_BSP_NETWORK_DRIVER_ATTACH  rtems_GT64260eth_driver_attach
0192 #else
0193 #define RTEMS_BSP_NETWORK_DRIVER_NAME  "wmG1"
0194 #define RTEMS_BSP_NETWORK_DRIVER_ATTACH  rtems_i82544EI_driver_attach
0195 #endif
0196
0197 struct rtems_bsdnet_ifconfig;
0198
0199 extern int RTEMS_BSP_NETWORK_DRIVER_ATTACH(struct rtems_bsdnet_ifconfig *, int);
0200
0201 #define gccMemBar() RTEMS_COMPILER_MEMORY_BARRIER()
0202
0203 static inline void lwmemBar(void)
0204 {
0205     __asm__ volatile("lwsync":::"memory");
0206 }
0207
0208 static inline void io_flush(void)
0209 {
0210     __asm__ volatile("isync":::"memory");
0211 }
0212
0213 static inline void memBar(void)
0214 {
0215     __asm__ volatile("sync":::"memory");
0216 }
0217
0218 static inline void ioBar(void)
0219 {
0220     __asm__ volatile("eieio":::"memory");
0221 }
0222
0223 #endif
0224
0225 /** @} */
0226
0227 #endif /* !ASM */