mvme3100/start/start.S

0001 /*
0002  *  start.S :     RTEMS entry point
0003  *
0004  *  Copyright (C) 1999 Eric Valette. valette@crf.canon.fr
0005  *
0006  *  The license and distribution terms for this file may be
0007  *  found in the file LICENSE in this distribution or at
0008  *  http://www.rtems.org/license/LICENSE.
0009  *
0010  *  Modified for mvme3100 by T. Straumann, 2007.
0011  *
0012  */
0013
0014 #include <rtems/asm.h>
0015 #include <libcpu/powerpc-utility.h>
0016
0017 #include <bspopts.h>
0018
0019 #define SYNC \
0020     sync; \
0021     isync
0022
0023 #define KERNELBASE  0x0
0024
0025 /* cannot include <bsp.h> from assembly :-( */
0026 #ifndef BSP_8540_CCSR_BASE
0027 #define BSP_8540_CCSR_BASE 0xe1000000
0028 #endif
0029
0030 #define ERR_DISABLE_REG (BSP_8540_CCSR_BASE + 0x2e44)
0031
0032     .text
0033     .globl  __rtems_entry_point
0034     .type   __rtems_entry_point,@function
0035 __rtems_entry_point:
0036     mr  r31,r3
0037     mr  r30,r4
0038     mr  r29,r5
0039     mr  r28,r6
0040     mr  r27,r7
0041     /* disable checking for memory-select errors; motload has all TLBs
0042      * mapping a possible larger area as memory (not-guarded, caching-enabled)
0043      * than actual physical memory is available.
0044      * In case of speculative loads this may cause 'memory-select' errors
0045      * which seem to raise 'core_fault_in' (found no description in
0046      * the manual but I experienced this problem).
0047      * Such errors (if HID1[RFXE] is clear) may *stall* execution
0048      * leading to mysterious 'hangs'.
0049      * Note: enabling HID1[RFXE] at this point makes no sense since
0050      *       exceptions are not configured yet. Therefore we disable
0051      *       memory-select errors.
0052      * Eventually (bspstart.c) we want to delete TLB entries for
0053      * which no physical memory is present.
0054      */
0055     lis r3, ERR_DISABLE_REG@ha
0056     lwz r4, ERR_DISABLE_REG@l(r3)
0057     /* disable memory-select errors */
0058     ori r4, r4, 1
0059     stw r4, ERR_DISABLE_REG@l(r3)
0060
0061     /* Use MotLoad's TLB setup for now; caches are on already */
0062     bl  __eabi  /* setup EABI and SYSV environment */
0063     bl  zero_bss
0064     /*
0065      * restore original args
0066      */
0067     mr  r3,r31
0068     mr  r4,r30
0069     mr  r5,r29
0070     mr  r6,r28
0071     mr  r7,r27
0072     bl  save_boot_params
0073
0074     /*
0075      * Initialize start stack.  The stacks are statically allocated and
0076      * properly aligned.
0077      */
0078     LA  r1, _ISR_Stack_area_end
0079     subi    r1, r1, PPC_DEFAULT_CACHE_LINE_SIZE
0080     li  r0, 0
0081     stw r0, 0(r1)
0082
0083     /*
0084      * We are now in a environment that is totally independent from
0085      * bootloader setup.
0086      */
0087     /* pass result of 'save_boot_params' to 'boot_card' in R3 */
0088     bl  boot_card
0089     /* point of no return: reset board here ? */