mpc8260ads/start/start.S

0001 /*  start.S
0002  *
0003  *  Modified for the Motorola PQII ADS board by
0004  *  Andy Dachs <a.dachs@sstl.co.uk> 23-11-00.
0005  *  Surrey Satellite Technology Limited
0006  *
0007  *  I have a proprietary bootloader programmed into the flash
0008  *  on the board which initialises the SDRAM prior to calling
0009  *  this function.
0010  *
0011  *  This file is based on the one by Jay Monkman (jmonkman@fracsa.com)
0012  *  which in turn was based on the dlentry.s file for the Papyrus BSP,
0013  *  written by:
0014  *
0015  *  Author:     Andrew Bray <andy@i-cubed.co.uk>
0016  *
0017  *  COPYRIGHT (c) 1995 by i-cubed ltd.
0018  *
0019  *  To anyone who acknowledges that this file is provided "AS IS"
0020  *  without any express or implied warranty:
0021  *      permission to use, copy, modify, and distribute this file
0022  *      for any purpose is hereby granted without fee, provided that
0023  *      the above copyright notice and this notice appears in all
0024  *      copies, and that the name of i-cubed limited not be used in
0025  *      advertising or publicity pertaining to distribution of the
0026  *      software without specific, written prior permission.
0027  *      i-cubed limited makes no representations about the suitability
0028  *      of this software for any purpose.
0029  *
0030  */
0031
0032 #include <rtems/asm.h>
0033 #include <libcpu/powerpc-utility.h>
0034
0035 /*
0036  *  The entry veneer has to clear the BSS and copy the read only
0037  *  version of the data segment to the correct location.
0038  */
0039
0040         .section ".entry"  /* This might have to be the first thing in the
0041                             * text section. At one time, it had to be
0042                             * first, but I don't believe it is true
0043                             * any more. */
0044         PUBLIC_VAR (start)
0045 SYM(start):
0046         bl      .startup
0047 base_addr:
0048
0049 /*
0050  * Parameters from linker
0051  */
0052 toc_pointer:
0053         .long   s.got
0054 bss_length:
0055         .long   bss.size
0056 bss_addr:
0057         .long   bss.start
0058
0059 PUBLIC_VAR (data_length )
0060 data_length:
0061     .long   data.size
0062 PUBLIC_VAR (data_addr )
0063 data_addr:
0064     .long   data.start
0065
0066 PUBLIC_VAR (text_addr)
0067 text_addr:
0068         .long   text.start
0069
0070 PUBLIC_VAR (text_length)
0071 text_length:
0072         .long   text.size
0073
0074 /*
0075  * Initialization code
0076  */
0077 .startup:
0078     /* Get start address */
0079         mflr    r1
0080
0081     /* --------------------------------------------------
0082      * Clear MSR[EE] to disable interrupts
0083      * Clear MSR[IP] bit to put vectors at 0x00000000
0084      * Set MSR[FP] to enable FPU - not on my eval board!
0085      * -------------------------------------------------- */
0086     mfmsr   r5
0087     lis r13, 0xFFFF
0088     ori r13, r13, 0x7FBF
0089     and     r5, r5, r13         /* Clear EE and IP */
0090 #if 1
0091     ori r5, r5, 0x2000          /* Enable FPU */
0092 #endif
0093     mtmsr   r5
0094
0095 #ifdef ENABLE_CACHE
0096     /* Enable caches */
0097     mfspr   r5, 1008
0098     ori r5, r5, 0x8000
0099     isync
0100     mtspr   1008, r5
0101
0102 /*  Leave D-cache disabled for now */
0103 #if 0
0104     ori r5, r5, 0x4000
0105     sync
0106     mtspr   1008, r5
0107 #endif
0108 #endif
0109
0110     /*--------------------------------------------------
0111      * Set up the power management modes
0112      * The 8260 has a dynamic power management mode that
0113      * is automatically invoked if the unit is idle.
0114      * We invoke the NAP mode in the RTEMS idle task.
0115      *-------------------------------------------------- */
0116
0117     lis r13, 0x0050     /* set nap mode and DPM */
0118     or  r5, r5, r13
0119     mtspr   1008, r5
0120
0121     /*--------------------------------------------------
0122      *
0123      *-------------------------------------------------- */
0124
0125         /* clear the bss section */
0126         bl      bssclr
0127
0128 /*
0129  * C_setup.
0130  */
0131
0132         /* set toc */
0133         lwz r2, toc_pointer-base_addr(r1)
0134
0135     /* Clear cmdline */
0136     li  r3, 0
0137
0138     /*
0139      * Initialize start stack.  The stacks are statically allocated and
0140      * properly aligned.
0141      */
0142     LA  r1, _ISR_Stack_area_end
0143     subi    r1, r1, PPC_DEFAULT_CACHE_LINE_SIZE
0144     stw r3, 0(r1)
0145
0146         .extern SYM (boot_card)
0147         bl       SYM (boot_card)    /* call the first C routine */
0148
0149     /* we don't expect to return from boot_card but if we do */
0150     /* wait here for watchdog to kick us into hard reset     */
0151
0152 twiddle:
0153     b       twiddle
0154
0155 /*
0156  * bssclr - zero out bss
0157  */
0158 bssclr:
0159         lwz     r4, bss_addr-base_addr(r1)      /* Start of bss */
0160         lwz     r5, bss_length-base_addr(r1)    /* Length of bss */
0161
0162         rlwinm. r5,r5,30,0x3FFFFFFF             /* form length/4 */
0163         beqlr                                   /* no bss */
0164         mtctr   r5                              /* set ctr reg */
0165         xor     r6,r6,r6                        /* r6 = 0 */
0166 clear_bss:
0167         stswi   r6,r4,0x4                       /* store r6 */
0168         addi    r4,r4,0x4                       /* update r2 */
0169
0170         bdnz    clear_bss                       /* dec counter and loop */
0171         blr                                     /* return */