include/bsp/irq.h

0001 /* irq.h
0002  *
0003  *  This include file describe the data structure and the functions implemented
0004  *  by rtems to write interrupt handlers.
0005  *
0006  *  CopyRight (C) 1999 valette@crf.canon.fr
0007  *
0008  *  This code is heavilly inspired by the public specification of STREAM V2
0009  *  that can be found at :
0010  *
0011  *      <http://www.chorus.com/Documentation/index.html> by following
0012  *  the STREAM API Specification Document link.
0013  *
0014  *  Modified for mpc8260 by Andy Dachs <a.dachs@sstl.co.uk>
0015  *  Surrey Satellite Technology Limited
0016  *    The interrupt handling on the mpc8260 seems quite different from
0017  *    the 860 (I don't know the 860 well).  Although some interrupts
0018  *    are routed via the CPM irq and some are direct to the SIU they all
0019  *    appear logically the same.  Therefore I removed the distinction
0020  *    between SIU and CPM interrupts.
0021  *
0022  *  The license and distribution terms for this file may be
0023  *  found in the file LICENSE in this distribution or at
0024  *  http://www.rtems.org/license/LICENSE.
0025  */
0026
0027 #ifndef LIBBSP_POWERPC_IRQ_H
0028 #define LIBBSP_POWERPC_IRQ_H
0029 #include <rtems/irq.h>
0030
0031 #ifndef ASM
0032
0033 #ifdef __cplusplus
0034 extern "C" {
0035 #endif
0036
0037 /*
0038 extern volatile unsigned int ppc_cached_irq_mask;
0039 */
0040
0041 /*
0042  * Symblolic IRQ names and related definitions.
0043  */
0044
0045   /*
0046    * CPM IRQ handlers related definitions
0047    * CAUTION : BSP_CPM_IRQ_LOWEST_OFFSET should be equal to OPENPIC_VEC_SOURCE
0048    */
0049 #define BSP_CPM_IRQ_NUMBER      (64)
0050 #define BSP_CPM_IRQ_LOWEST_OFFSET   (0)
0051 #define BSP_CPM_IRQ_MAX_OFFSET      (BSP_CPM_IRQ_LOWEST_OFFSET + BSP_CPM_IRQ_NUMBER - 1)
0052   /*
0053    * PowerPc exceptions handled as interrupt where a rtems managed interrupt
0054    * handler might be connected
0055    */
0056 #define BSP_PROCESSOR_IRQ_NUMBER    (1)
0057 #define BSP_PROCESSOR_IRQ_LOWEST_OFFSET (BSP_CPM_IRQ_MAX_OFFSET + 1)
0058 #define BSP_PROCESSOR_IRQ_MAX_OFFSET    (BSP_PROCESSOR_IRQ_LOWEST_OFFSET + BSP_PROCESSOR_IRQ_NUMBER - 1)
0059   /*
0060    * Summary
0061    */
0062 #define BSP_IRQ_NUMBER          (BSP_PROCESSOR_IRQ_MAX_OFFSET + 1)
0063 #define BSP_LOWEST_OFFSET       (BSP_CPM_IRQ_LOWEST_OFFSET)
0064 #define BSP_MAX_OFFSET          (BSP_PROCESSOR_IRQ_MAX_OFFSET)
0065
0066   /*
0067    * Some SIU IRQ symbolic name definition. Please note that
0068    * INT IRQ are defined but a single one will be used to
0069    * redirect all CPM interrupt.
0070    *
0071    * On the mpc8260 all this seems to be transparent.  Although the
0072    * CPM, PIT and TMCNT interrupt may well be the only interrupts routed
0073    * to the SIU at the hardware level all of them appear as CPM interupts
0074    * to software apart from the registers for setting priority.
0075    *
0076    * The MPC8260 User Manual seems shot through with inconsistencies
0077    * about this whole area.
0078    */
0079
0080   /*
0081    * Some CPM IRQ symbolic name definition
0082    */
0083 #define BSP_CPM_IRQ_ERROR       (BSP_CPM_IRQ_LOWEST_OFFSET + 0)
0084 #define BSP_CPM_IRQ_I2C         (BSP_CPM_IRQ_LOWEST_OFFSET + 1)
0085 #define BSP_CPM_IRQ_SPI         (BSP_CPM_IRQ_LOWEST_OFFSET + 2)
0086 #define BSP_CPM_IRQ_RISC_TIMERS     (BSP_CPM_IRQ_LOWEST_OFFSET + 3)
0087 #define BSP_CPM_IRQ_SMC1        (BSP_CPM_IRQ_LOWEST_OFFSET + 4)
0088 #define BSP_CPM_IRQ_SMC2        (BSP_CPM_IRQ_LOWEST_OFFSET + 5)
0089 #define BSP_CPM_IRQ_IDMA1       (BSP_CPM_IRQ_LOWEST_OFFSET + 6)
0090 #define BSP_CPM_IRQ_IDMA2       (BSP_CPM_IRQ_LOWEST_OFFSET + 7)
0091 #define BSP_CPM_IRQ_IDMA3       (BSP_CPM_IRQ_LOWEST_OFFSET + 8)
0092 #define BSP_CPM_IRQ_IDMA4       (BSP_CPM_IRQ_LOWEST_OFFSET + 9)
0093 #define BSP_CPM_IRQ_SDMA        (BSP_CPM_IRQ_LOWEST_OFFSET + 10)
0094
0095 #define BSP_CPM_IRQ_TIMER_1     (BSP_CPM_IRQ_LOWEST_OFFSET + 12)
0096 #define BSP_CPM_IRQ_TIMER_2     (BSP_CPM_IRQ_LOWEST_OFFSET + 13)
0097 #define BSP_CPM_IRQ_TIMER_3     (BSP_CPM_IRQ_LOWEST_OFFSET + 14)
0098 #define BSP_CPM_IRQ_TIMER_4     (BSP_CPM_IRQ_LOWEST_OFFSET + 15)
0099 #define BSP_CPM_IRQ_TMCNT       (BSP_CPM_IRQ_LOWEST_OFFSET + 16)
0100 #define BSP_CPM_IRQ_PIT         (BSP_CPM_IRQ_LOWEST_OFFSET + 17)
0101
0102 #define BSP_CPM_IRQ_IRQ1        (BSP_CPM_IRQ_LOWEST_OFFSET + 19)
0103 #define BSP_CPM_IRQ_IRQ2        (BSP_CPM_IRQ_LOWEST_OFFSET + 20)
0104 #define BSP_CPM_IRQ_IRQ3        (BSP_CPM_IRQ_LOWEST_OFFSET + 21)
0105 #define BSP_CPM_IRQ_IRQ4        (BSP_CPM_IRQ_LOWEST_OFFSET + 22)
0106 #define BSP_CPM_IRQ_IRQ5        (BSP_CPM_IRQ_LOWEST_OFFSET + 23)
0107 #define BSP_CPM_IRQ_IRQ6        (BSP_CPM_IRQ_LOWEST_OFFSET + 24)
0108 #define BSP_CPM_IRQ_IRQ7        (BSP_CPM_IRQ_LOWEST_OFFSET + 25)
0109
0110 #define BSP_CPM_IRQ_FCC1        (BSP_CPM_IRQ_LOWEST_OFFSET + 32)
0111 #define BSP_CPM_IRQ_FCC2        (BSP_CPM_IRQ_LOWEST_OFFSET + 33)
0112 #define BSP_CPM_IRQ_FCC3        (BSP_CPM_IRQ_LOWEST_OFFSET + 34)
0113 #define BSP_CPM_IRQ_MCC1        (BSP_CPM_IRQ_LOWEST_OFFSET + 36)
0114 #define BSP_CPM_IRQ_MCC2        (BSP_CPM_IRQ_LOWEST_OFFSET + 37)
0115
0116 #define BSP_CPM_IRQ_SCC1        (BSP_CPM_IRQ_LOWEST_OFFSET + 40)
0117 #define BSP_CPM_IRQ_SCC2        (BSP_CPM_IRQ_LOWEST_OFFSET + 41)
0118 #define BSP_CPM_IRQ_SCC3        (BSP_CPM_IRQ_LOWEST_OFFSET + 42)
0119 #define BSP_CPM_IRQ_SCC4        (BSP_CPM_IRQ_LOWEST_OFFSET + 43)
0120
0121 #define BSP_CPM_IRQ_PC15        (BSP_CPM_IRQ_LOWEST_OFFSET + 48)
0122 #define BSP_CPM_IRQ_PC14        (BSP_CPM_IRQ_LOWEST_OFFSET + 49)
0123 #define BSP_CPM_IRQ_PC13        (BSP_CPM_IRQ_LOWEST_OFFSET + 50)
0124 #define BSP_CPM_IRQ_PC12        (BSP_CPM_IRQ_LOWEST_OFFSET + 51)
0125 #define BSP_CPM_IRQ_PC11        (BSP_CPM_IRQ_LOWEST_OFFSET + 52)
0126 #define BSP_CPM_IRQ_PC10        (BSP_CPM_IRQ_LOWEST_OFFSET + 53)
0127 #define BSP_CPM_IRQ_PC9         (BSP_CPM_IRQ_LOWEST_OFFSET + 54)
0128 #define BSP_CPM_IRQ_PC8         (BSP_CPM_IRQ_LOWEST_OFFSET + 55)
0129 #define BSP_CPM_IRQ_PC7         (BSP_CPM_IRQ_LOWEST_OFFSET + 56)
0130 #define BSP_CPM_IRQ_PC6         (BSP_CPM_IRQ_LOWEST_OFFSET + 57)
0131 #define BSP_CPM_IRQ_PC5         (BSP_CPM_IRQ_LOWEST_OFFSET + 58)
0132 #define BSP_CPM_IRQ_PC4         (BSP_CPM_IRQ_LOWEST_OFFSET + 59)
0133 #define BSP_CPM_IRQ_PC3         (BSP_CPM_IRQ_LOWEST_OFFSET + 60)
0134 #define BSP_CPM_IRQ_PC2         (BSP_CPM_IRQ_LOWEST_OFFSET + 61)
0135 #define BSP_CPM_IRQ_PC1         (BSP_CPM_IRQ_LOWEST_OFFSET + 62)
0136 #define BSP_CPM_IRQ_PC0         (BSP_CPM_IRQ_LOWEST_OFFSET + 63)
0137
0138     /*
0139      * Some Processor exception handled as rtems IRQ symbolic name definition
0140      */
0141 #define BSP_DECREMENTER         (BSP_PROCESSOR_IRQ_LOWEST_OFFSET)
0142 #define BSP_PERIODIC_TIMER      (BSP_DECREMENTER)
0143
0144 #define BSP_INTERRUPT_VECTOR_COUNT (BSP_MAX_OFFSET + 1)
0145
0146 #define CPM_INTERRUPT
0147
0148 /*-------------------------------------------------------------------------+
0149 | Function Prototypes.
0150 +--------------------------------------------------------------------------*/
0151 /*
0152  * ------------------------ PPC CPM Mngt Routines -------
0153  */
0154
0155 /*
0156  * function to disable a particular irq. After calling
0157  * this function, even if the device asserts the interrupt line it will
0158  * not be propagated further to the processor
0159  */
0160 int BSP_irq_disable_at_cpm        (const rtems_irq_number irqLine);
0161 /*
0162  * function to enable a particular irq. After calling
0163  * this function, if the device asserts the interrupt line it will
0164  * be propagated further to the processor
0165  */
0166 int BSP_irq_enable_at_cpm       (const rtems_irq_number irqLine);
0167 /*
0168  * function to acknoledge a particular irq. After calling
0169  * this function, if a device asserts an enabled interrupt line it will
0170  * be propagated further to the processor. Mainly usefull for people
0171  * writting raw handlers as this is automagically done for rtems managed
0172  * handlers.
0173  */
0174 int BSP_irq_ack_at_cpm                  (const rtems_irq_number irqLine);
0175 /*
0176  * function to check if a particular irq is enabled. After calling
0177  */
0178 int BSP_irq_enabled_at_cpm      (const rtems_irq_number irqLine);
0179
0180 extern void BSP_rtems_irq_mng_init(unsigned cpuId);
0181
0182 #ifdef __cplusplus
0183 }
0184 #endif
0185
0186 /* Now that we have defined some basics, include the generic support */
0187 #include <bsp/irq-generic.h>
0188
0189 #endif
0190
0191 #endif