mpc55xxevb/start/start-cache.S

0001 /* SPDX-License-Identifier: BSD-2-Clause */
0002
0003 /**
0004  * @file
0005  *
0006  * @ingroup mpc55xx_asm
0007  *
0008  * @brief Cache initialization.
0009  */
0010
0011 /*
0012  * Copyright (C) 2008, 2012 embedded brains GmbH & Co. KG
0013  *
0014  * Redistribution and use in source and binary forms, with or without
0015  * modification, are permitted provided that the following conditions
0016  * are met:
0017  * 1. Redistributions of source code must retain the above copyright
0018  *    notice, this list of conditions and the following disclaimer.
0019  * 2. Redistributions in binary form must reproduce the above copyright
0020  *    notice, this list of conditions and the following disclaimer in the
0021  *    documentation and/or other materials provided with the distribution.
0022  *
0023  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
0024  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
0025  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
0026  * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
0027  * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
0028  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
0029  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
0030  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
0031  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
0032  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
0033  * POSSIBILITY OF SUCH DAMAGE.
0034  */
0035
0036 #include <libcpu/powerpc-utility.h>
0037
0038 #include <mpc55xx/regs.h>
0039
0040     .globl  mpc55xx_start_cache
0041
0042     .section    ".bsp_start_text", "ax"
0043
0044 mpc55xx_start_cache:
0045
0046 #ifdef MPC55XX_NEEDS_LOW_LEVEL_INIT
0047
0048     /* Load zero, CINV, and CABT) */
0049     li  r0, 0
0050     li  r3, 0x2
0051     li  r4, 0x4
0052
0053 #if defined(BSP_INSTRUCTION_CACHE_ENABLED) \
0054   && defined(MPC55XX_HAS_INSTRUCTION_CACHE)
0055
0056 start_instruction_cache_invalidation:
0057
0058     /* Clear instruction cache invalidation abort */
0059     mtspr   FSL_EIS_L1CSR1, r0
0060
0061     /* Start instruction cache invalidation */
0062     mtspr   FSL_EIS_L1CSR1, r3
0063
0064 get_instruction_cache_invalidation_status:
0065
0066     /* Get instruction cache invalidation status */
0067     mfspr   r5, FSL_EIS_L1CSR1
0068
0069     /* Check CABT */
0070     and.    r6, r5, r4
0071     bne start_instruction_cache_invalidation
0072
0073     /* Check CINV */
0074     and.    r6, r5, r3
0075     bne get_instruction_cache_invalidation_status
0076
0077     /* Save instruction cache settings */
0078     LWI r6, 0x00010001
0079     isync
0080     msync
0081     mtspr   FSL_EIS_L1CSR1, r6
0082
0083 #endif
0084
0085 #if (defined(BSP_DATA_CACHE_ENABLED) && defined(MPC55XX_HAS_DATA_CACHE)) \
0086   || ((defined(BSP_DATA_CACHE_ENABLED) \
0087     || defined(BSP_INSTRUCTION_CACHE_ENABLED)) \
0088       && defined(MPC55XX_HAS_UNIFIED_CACHE))
0089
0090 start_data_cache_invalidation:
0091
0092     /* Clear data cache invalidation abort */
0093     mtspr   FSL_EIS_L1CSR0, r0
0094
0095     /* Start data cache invalidation */
0096     mtspr   FSL_EIS_L1CSR0, r3
0097
0098 get_data_cache_invalidation_status:
0099
0100     /* Get data cache invalidation status */
0101     mfspr   r5, FSL_EIS_L1CSR0
0102
0103     /* Check CABT */
0104     and.    r6, r5, r4
0105     bne start_data_cache_invalidation
0106
0107     /* Check CINV */
0108     and.    r6, r5, r3
0109     bne get_data_cache_invalidation_status
0110
0111     /* Save data cache settings */
0112 #if MPC55XX_CHIP_FAMILY != 567
0113     /* FIXME: CORG??? 0x00180011 */
0114     LWI r6, 0x00100001
0115 #else
0116     LWI r6, 0x00190001
0117 #endif
0118     isync
0119     msync
0120     mtspr   FSL_EIS_L1CSR0, r6
0121
0122 #endif
0123
0124 #endif /* MPC55XX_NEEDS_LOW_LEVEL_INIT */
0125
0126     /* Return */
0127     blr