mpc55xxevb/start/irq.c

0001 /* SPDX-License-Identifier: BSD-2-Clause */
0002
0003 /**
0004  * @file
0005  *
0006  * @ingroup RTEMSBSPsPowerPCMPC55XX
0007  *
0008  * @brief Source file for MPC55XX interrupt support.
0009  */
0010
0011 /*
0012  * Copyright (C) 2008, 2012 embedded brains GmbH & Co. KG
0013  *
0014  * Redistribution and use in source and binary forms, with or without
0015  * modification, are permitted provided that the following conditions
0016  * are met:
0017  * 1. Redistributions of source code must retain the above copyright
0018  *    notice, this list of conditions and the following disclaimer.
0019  * 2. Redistributions in binary form must reproduce the above copyright
0020  *    notice, this list of conditions and the following disclaimer in the
0021  *    documentation and/or other materials provided with the distribution.
0022  *
0023  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
0024  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
0025  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
0026  * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
0027  * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
0028  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
0029  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
0030  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
0031  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
0032  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
0033  * POSSIBILITY OF SUCH DAMAGE.
0034  */
0035
0036 #include <mpc55xx/regs.h>
0037
0038 #include <libcpu/powerpc-utility.h>
0039
0040 #include <bsp/irq.h>
0041 #include <bsp/vectors.h>
0042 #include <bsp/irq-generic.h>
0043
0044 #define RTEMS_STATUS_CHECKS_USE_PRINTK
0045
0046 #include <rtems/status-checks.h>
0047
0048 rtems_status_code bsp_interrupt_get_priority(
0049     rtems_vector_number vector,
0050     uint32_t *priority
0051 )
0052 {
0053     bsp_interrupt_assert( bsp_interrupt_is_valid_vector( vector));
0054     bsp_interrupt_assert( priority != NULL);
0055     *priority = MPC55XX_INTC_DISABLED_PRIORITY - INTC.PSR [vector].B.PRI;
0056     return RTEMS_SUCCESSFUL;
0057 }
0058
0059 rtems_status_code bsp_interrupt_set_priority(
0060     rtems_vector_number vector,
0061     uint32_t priority
0062 )
0063 {
0064     bsp_interrupt_assert( bsp_interrupt_is_valid_vector( vector));
0065
0066     if (!MPC55XX_INTC_IS_VALID_PRIORITY( priority)) {
0067         return RTEMS_INVALID_PRIORITY;
0068     }
0069
0070     INTC.PSR [vector].B.PRI = MPC55XX_INTC_DISABLED_PRIORITY - priority;
0071     return RTEMS_SUCCESSFUL;
0072 }
0073
0074 /**
0075  * @brief Raises the software IRQ with number @a vector.
0076  */
0077 rtems_status_code mpc55xx_intc_raise_software_irq( rtems_vector_number vector)
0078 {
0079     if (MPC55XX_IRQ_IS_SOFTWARE( vector)) {
0080         INTC.SSCIR [vector].B.SET = 1;
0081         return RTEMS_SUCCESSFUL;
0082     } else {
0083         return RTEMS_INVALID_NUMBER;
0084     }
0085 }
0086
0087 /**
0088  * @brief Clears the software IRQ with number @a vector.
0089  */
0090 rtems_status_code mpc55xx_intc_clear_software_irq( rtems_vector_number vector)
0091 {
0092     if (MPC55XX_IRQ_IS_SOFTWARE( vector)) {
0093         INTC.SSCIR [vector].B.CLR = 1;
0094         return RTEMS_SUCCESSFUL;
0095     } else {
0096         return RTEMS_INVALID_NUMBER;
0097     }
0098 }
0099
0100 /**
0101  * @brief Installs interrupt handler and sets priority.
0102  */
0103 rtems_status_code mpc55xx_interrupt_handler_install(
0104     rtems_vector_number vector,
0105     const char *info,
0106     rtems_option options,
0107     unsigned priority,
0108     rtems_interrupt_handler handler,
0109     void *arg
0110 )
0111 {
0112     if (MPC55XX_IRQ_IS_VALID( vector) && MPC55XX_INTC_IS_VALID_PRIORITY( priority)) {
0113         rtems_status_code sc = RTEMS_SUCCESSFUL;
0114
0115         sc = rtems_interrupt_handler_install( vector, info, options, handler, arg);
0116         RTEMS_CHECK_SC( sc, "Install interrupt handler");
0117
0118         return rtems_interrupt_set_priority( vector, priority);
0119     } else {
0120         return RTEMS_INVALID_NUMBER;
0121     }
0122 }
0123
0124 void bsp_interrupt_dispatch(uintptr_t exception_number)
0125 {
0126     /* Acknowledge interrupt request */
0127     rtems_vector_number vector = INTC.IACKR.B.INTVEC;
0128
0129     /* Save machine state and enable external exceptions */
0130     uint32_t msr = ppc_external_exceptions_enable();
0131
0132     /* Dispatch interrupt handlers */
0133     bsp_interrupt_handler_dispatch( vector);
0134
0135     /* Restore machine state */
0136     ppc_external_exceptions_disable( msr);
0137
0138     /* End of interrupt */
0139     INTC.EOIR.R = 1;
0140 }
0141
0142 void bsp_interrupt_facility_initialize(void)
0143 {
0144     rtems_vector_number vector;
0145
0146     /* Initialize interrupt controller */
0147
0148     /* Disable all interrupts */
0149     for (vector = MPC55XX_IRQ_MIN; vector <= MPC55XX_IRQ_MAX; ++vector) {
0150         INTC.PSR [vector].B.PRI = MPC55XX_INTC_DISABLED_PRIORITY;
0151     }
0152
0153     /* Software vector mode */
0154     INTC.MCR.B.VTES = 0;
0155     INTC.MCR.B.HVEN = 0;
0156
0157     /* Set current priority to 0 */
0158     INTC.CPR.B.PRI = 0;
0159 }
0160
0161 rtems_status_code bsp_interrupt_get_attributes(
0162   rtems_vector_number         vector,
0163   rtems_interrupt_attributes *attributes
0164 )
0165 {
0166   attributes->maximum_priority = MPC55XX_INTC_DISABLED_PRIORITY;
0167   attributes->can_get_priority = true;
0168   attributes->can_set_priority = true;
0169   return RTEMS_SUCCESSFUL;
0170 }
0171
0172 rtems_status_code bsp_interrupt_is_pending(
0173   rtems_vector_number vector,
0174   bool               *pending
0175 )
0176 {
0177   bsp_interrupt_assert(bsp_interrupt_is_valid_vector(vector));
0178   bsp_interrupt_assert(pending != NULL);
0179   *pending = false;
0180   return RTEMS_UNSATISFIED;
0181 }
0182
0183 rtems_status_code bsp_interrupt_raise(rtems_vector_number vector)
0184 {
0185   bsp_interrupt_assert(bsp_interrupt_is_valid_vector(vector));
0186   return RTEMS_UNSATISFIED;
0187 }
0188
0189 rtems_status_code bsp_interrupt_clear(rtems_vector_number vector)
0190 {
0191   bsp_interrupt_assert(bsp_interrupt_is_valid_vector(vector));
0192   return RTEMS_UNSATISFIED;
0193 }
0194
0195 rtems_status_code bsp_interrupt_vector_is_enabled(
0196   rtems_vector_number vector,
0197   bool               *enabled
0198 )
0199 {
0200   bsp_interrupt_assert(bsp_interrupt_is_valid_vector(vector));
0201   bsp_interrupt_assert(enabled != NULL);
0202   *enabled = false;
0203   return RTEMS_UNSATISFIED;
0204 }
0205
0206 rtems_status_code bsp_interrupt_vector_enable( rtems_vector_number vector)
0207 {
0208     return bsp_interrupt_set_priority( vector, MPC55XX_INTC_DEFAULT_PRIORITY);
0209 }
0210
0211 rtems_status_code bsp_interrupt_vector_disable( rtems_vector_number vector)
0212 {
0213     return bsp_interrupt_set_priority( vector, MPC55XX_INTC_DISABLED_PRIORITY);
0214 }