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0036 #include <mpc55xx/mpc55xx.h>
0037 #include <mpc55xx/regs.h>
0038 #include <mpc55xx/edma.h>
0039 #include <mpc55xx/emios.h>
0040
0041 #include <string.h>
0042
0043 #include <rtems.h>
0044 #include <rtems/config.h>
0045 #include <rtems/counter.h>
0046
0047 #include <libcpu/powerpc-utility.h>
0048 #include <bsp/vectors.h>
0049
0050 #include <bsp.h>
0051 #include <bsp/bootcard.h>
0052 #include <bsp/irq.h>
0053 #include <bsp/irq-generic.h>
0054 #include <bsp/linker-symbols.h>
0055 #include <bsp/start.h>
0056 #include <bsp/mpc55xx-config.h>
0057
0058
0059 LINKER_SYMBOL(mpc55xx_exc_vector_base);
0060
0061 unsigned int bsp_clock_speed = 0;
0062
0063 uint32_t bsp_clicks_per_usec = 0;
0064
0065 static void null_pointer_protection(void)
0066 {
0067 #ifdef MPC55XX_NULL_POINTER_PROTECTION
0068 struct MMU_tag mmu = { .MAS0 = { .B = { .TLBSEL = 1, .ESEL = 1 } } };
0069
0070 PPC_SET_SPECIAL_PURPOSE_REGISTER(FSL_EIS_MAS0, mmu.MAS0.R);
0071 __asm__ volatile ("tlbre");
0072 PPC_SPECIAL_PURPOSE_REGISTER(FSL_EIS_MAS1, mmu.MAS1.R);
0073 mmu.MAS1.B.VALID = 0;
0074 PPC_SET_SPECIAL_PURPOSE_REGISTER(FSL_EIS_MAS1, mmu.MAS1.R);
0075 __asm__ volatile ("tlbwe");
0076 #endif
0077 }
0078
0079 uint32_t _CPU_Counter_frequency(void)
0080 {
0081 return bsp_clock_speed;
0082 }
0083
0084 void bsp_start(void)
0085 {
0086 null_pointer_protection();
0087
0088
0089
0090
0091
0092
0093 get_ppc_cpu_type();
0094 get_ppc_cpu_revision();
0095
0096
0097
0098
0099 bsp_clock_speed = mpc55xx_get_system_clock() / MPC55XX_SYSTEM_CLOCK_DIVIDER;
0100
0101
0102 bsp_clicks_per_usec = bsp_clock_speed / 1000000;
0103
0104 ppc_exc_initialize_with_vector_base(
0105 (uintptr_t) _ISR_Stack_area_begin,
0106 mpc55xx_exc_vector_base
0107 );
0108 bsp_interrupt_initialize();
0109
0110 #if MPC55XX_CHIP_FAMILY != 566
0111 mpc55xx_edma_init();
0112 #endif
0113
0114 #ifdef MPC55XX_EMIOS_PRESCALER
0115 mpc55xx_emios_initialize(MPC55XX_EMIOS_PRESCALER);
0116 #endif
0117 }