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File indexing completed on 2025-05-11 08:23:56

0001 /* SPDX-License-Identifier: BSD-2-Clause */
0002 
0003 /**
0004  * @file
0005  *
0006  * @ingroup RTEMSBSPsPowerPCMPC55XX
0007  *
0008  * @brief Register definitions for the MPC55xx and MPC56xx microcontroller
0009  * family.
0010  */
0011 
0012 /*
0013  * Copyright (C) 2008, 2013 embedded brains GmbH & Co. KG
0014  *
0015  * Redistribution and use in source and binary forms, with or without
0016  * modification, are permitted provided that the following conditions
0017  * are met:
0018  * 1. Redistributions of source code must retain the above copyright
0019  *    notice, this list of conditions and the following disclaimer.
0020  * 2. Redistributions in binary form must reproduce the above copyright
0021  *    notice, this list of conditions and the following disclaimer in the
0022  *    documentation and/or other materials provided with the distribution.
0023  *
0024  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
0025  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
0026  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
0027  * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
0028  * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
0029  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
0030  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
0031  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
0032  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
0033  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
0034  * POSSIBILITY OF SUCH DAMAGE.
0035  */
0036 
0037 #ifndef LIBCPU_POWERPC_MPC55XX_REGS_H
0038 #define LIBCPU_POWERPC_MPC55XX_REGS_H
0039 
0040 #include <bspopts.h>
0041 
0042 #if MPC55XX_CHIP_FAMILY == 551
0043   #include <mpc55xx/fsl-mpc551x.h>
0044   #define MPC55XX_HAS_EBI
0045   #define MPC55XX_HAS_ESCI
0046   #define MPC55XX_HAS_EMIOS
0047   #define MPC55XX_HAS_FMPLL_ENHANCED
0048   #define MPC55XX_HAS_SIU
0049 #elif MPC55XX_CHIP_FAMILY == 555
0050   #include <mpc55xx/fsl-mpc555x.h>
0051   #define MPC55XX_HAS_EBI
0052   #define MPC55XX_HAS_ESCI
0053   #define MPC55XX_HAS_EMIOS
0054   #define MPC55XX_HAS_FMPLL
0055   #define MPC55XX_HAS_UNIFIED_CACHE
0056   #define MPC55XX_HAS_SIU
0057 #elif MPC55XX_CHIP_FAMILY == 556
0058   #include <mpc55xx/fsl-mpc556x.h>
0059   #define MPC55XX_HAS_EBI
0060   #define MPC55XX_HAS_ESCI
0061   #define MPC55XX_HAS_EMIOS
0062   #define MPC55XX_HAS_FMPLL
0063   #define MPC55XX_HAS_UNIFIED_CACHE
0064   #define MPC55XX_HAS_SIU
0065 #elif MPC55XX_CHIP_FAMILY == 564
0066   #include <mpc55xx/fsl-mpc564xL.h>
0067   #define MPC55XX_HAS_STM
0068   #define MPC55XX_HAS_SWT
0069   #define MPC55XX_HAS_MODE_CONTROL
0070   #define MPC55XX_HAS_INSTRUCTION_CACHE
0071   #define MPC55XX_HAS_LINFLEX
0072   #define MPC55XX_HAS_SECOND_INTERNAL_RAM_AREA
0073   #define MPC55XX_HAS_SIU_LITE
0074 #elif MPC55XX_CHIP_FAMILY == 566
0075   #include <mpc55xx/fsl-mpc5668.h>
0076   #define MPC55XX_HAS_ESCI
0077   #define MPC55XX_HAS_EMIOS
0078   #define MPC55XX_HAS_FMPLL_ENHANCED
0079   #define MPC55XX_HAS_UNIFIED_CACHE
0080   #define MPC55XX_HAS_SIU
0081   /*
0082    * TODO: This e200z650n3e core has a wait instruction, but it did not wake-up
0083    * from PIT interrupts.
0084    */
0085 #elif MPC55XX_CHIP_FAMILY == 567
0086   #include <mpc55xx/fsl-mpc567x.h>
0087   #define MPC55XX_HAS_EBI
0088   #define MPC55XX_HAS_ESCI
0089   #define MPC55XX_HAS_EMIOS
0090   #define MPC55XX_HAS_FMPLL_ENHANCED
0091   #define MPC55XX_HAS_INSTRUCTION_CACHE
0092   #define MPC55XX_HAS_DATA_CACHE
0093   #define MPC55XX_HAS_SIU
0094   #define MPC55XX_HAS_WAIT_INSTRUCTION
0095 #else
0096   #error "unsupported chip type"
0097 #endif
0098 
0099 #define MPC55XX_ZERO_FLAGS { .R = 0 }
0100 
0101 #endif /* LIBCPU_POWERPC_MPC55XX_REGS_H */