include/mpc55xx/mpc55xx.h

0001 /* SPDX-License-Identifier: BSD-2-Clause */
0002
0003 /**
0004  * @file
0005  *
0006  * @ingroup RTEMSBSPsPowerPCMPC55XX
0007  *
0008  * @brief Documentation for this file
0009  */
0010
0011 /*
0012  * Copyright (C) 2008, 2012 embedded brains GmbH & Co. KG
0013  *
0014  * Redistribution and use in source and binary forms, with or without
0015  * modification, are permitted provided that the following conditions
0016  * are met:
0017  * 1. Redistributions of source code must retain the above copyright
0018  *    notice, this list of conditions and the following disclaimer.
0019  * 2. Redistributions in binary form must reproduce the above copyright
0020  *    notice, this list of conditions and the following disclaimer in the
0021  *    documentation and/or other materials provided with the distribution.
0022  *
0023  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
0024  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
0025  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
0026  * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
0027  * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
0028  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
0029  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
0030  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
0031  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
0032  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
0033  * POSSIBILITY OF SUCH DAMAGE.
0034  */
0035
0036 /**
0037  * @defgroup mpc55xx_config Configuration files
0038  *
0039  * @ingroup RTEMSBSPsPowerPCMPC55XX
0040  *
0041  * Makefiles, configure scripts etc.
0042  */
0043
0044 /**
0045  * @page mpc55xx_ext_doc External Documentation
0046  *
0047  * @section mpc55xx_ext_doc_mpc5567rm_1 MPC5567 Microcontroller Reference Manual (Rev. 1, January 2007, Volume 1 of 2)
0048  * @section mpc55xx_ext_doc_mpc5567rm_2 MPC5567 Microcontroller Reference Manual (Rev. 1, January 2007, Volume 2 of 2)
0049  */
0050
0051 #ifndef LIBCPU_POWERPC_MPC55XX_H
0052 #define LIBCPU_POWERPC_MPC55XX_H
0053
0054 #include <mpc55xx/regs.h>
0055 #include <mpc55xx/regs-mmu.h>
0056
0057 #include <libcpu/powerpc-utility.h>
0058
0059 #ifdef __cplusplus
0060 extern "C" {
0061 #endif /* __cplusplus */
0062
0063 int mpc55xx_flash_copy(void *dest, const void *src, size_t nbytes);
0064 int mpc55xx_flash_copy_op(void *rdest, const void *src, size_t nbytes,
0065   uint32_t opmask, uint32_t *p_fail_addr);
0066 int mpc55xx_flash_size(uint32_t *p_size);
0067 int mpc55xx_flash_writable(void);
0068 uint32_t mpc55xx_flash_address(void);
0069 void mpc55xx_flash_set_read_only(void);
0070 void mpc55xx_flash_set_read_write(void);
0071
0072 int mpc55xx_physical_address(const void *addr, uint32_t *p_result);
0073 int mpc55xx_mapped_address(const void *addr, uint32_t *p_result);
0074
0075 /* Bits for opmask. */
0076 #define MPC55XX_FLASH_BLANK_CHECK 0x01
0077 #define MPC55XX_FLASH_UNLOCK      0x02
0078 #define MPC55XX_FLASH_ERASE       0x04
0079 #define MPC55XX_FLASH_PROGRAM     0x08
0080 #define MPC55XX_FLASH_VERIFY      0x10
0081
0082 /* Error returns.  CONFIG or SIZE might mean you just
0083  * need to check for new configuration bits.
0084  * SIZE and RANGE mean you are outside of a known flash region.
0085  * ERASE means the erase failed,
0086  * PROGRAM means the program failed,
0087  * BLANK means it wasn't blank and BLANK_CHECK was specified,
0088  * VERIFY means VERIFY was set and it didn't match the source,
0089  * and LOCK means either the locking failed or you needed to
0090  * specify MPC55XX_FLASH_UNLOCK and didn't.
0091  */
0092 #define MPC55XX_FLASH_CONFIG_ERR    (-1)
0093 #define MPC55XX_FLASH_SIZE_ERR      (-2)
0094 #define MPC55XX_FLASH_RANGE_ERR     (-3)
0095 #define MPC55XX_FLASH_ERASE_ERR     (-4)
0096 #define MPC55XX_FLASH_PROGRAM_ERR   (-5)
0097 #define MPC55XX_FLASH_NOT_BLANK_ERR (-6)
0098 #define MPC55XX_FLASH_VERIFY_ERR    (-7)
0099 #define MPC55XX_FLASH_LOCK_ERR      (-8)
0100
0101 #define MPC55XX_CACHE_ALIGNED_MASK ((uintptr_t) 0x1f)
0102
0103 #define MPC55XX_CACHE_LINE_SIZE 32
0104
0105 /**
0106  * @brief Returns true if the buffer starting at @a s of size @a n is cache aligned.
0107  */
0108 static inline int mpc55xx_is_cache_aligned( const void *s, size_t n)
0109 {
0110     return !(((uintptr_t) s & MPC55XX_CACHE_ALIGNED_MASK) || (n & MPC55XX_CACHE_ALIGNED_MASK));
0111 }
0112
0113 static inline uintptr_t mpc55xx_cache_aligned_start( const void *s)
0114 {
0115     return ((uintptr_t) s & MPC55XX_CACHE_ALIGNED_MASK) ? (((uintptr_t) s & ~MPC55XX_CACHE_ALIGNED_MASK) + MPC55XX_CACHE_LINE_SIZE) : (uintptr_t)s;
0116 }
0117
0118 static inline size_t mpc55xx_non_cache_aligned_size( const void *s)
0119 {
0120     return (uintptr_t) mpc55xx_cache_aligned_start( s) - (uintptr_t) s;
0121 }
0122
0123 static inline size_t mpc55xx_cache_aligned_size( const void *s, size_t n)
0124 {
0125     return (n - mpc55xx_non_cache_aligned_size( s)) & ~MPC55XX_CACHE_ALIGNED_MASK;
0126 }
0127
0128 /**
0129  * @brief Returns the number of leading zeros.
0130  */
0131 static inline uint32_t mpc55xx_count_leading_zeros( uint32_t value)
0132 {
0133     uint32_t count;
0134     __asm__ (
0135         "cntlzw %0, %1;"
0136         : "=r" (count)
0137         : "r" (value)
0138     );
0139     return count;
0140 }
0141
0142 static inline void mpc55xx_wait_for_interrupt(void)
0143 {
0144   #ifdef MPC55XX_HAS_WAIT_INSTRUCTION
0145     __asm__ volatile (
0146       ".machine \"push\"\n"
0147       ".machine \"any\"\n"
0148       "wait\n"
0149       ".machine \"pop\""
0150     );
0151   #else
0152     __asm__ volatile ("");
0153   #endif
0154 }
0155
0156 static inline void mpc55xx_mmu_apply_config(const struct MMU_tag *config)
0157 {
0158   PPC_SET_SPECIAL_PURPOSE_REGISTER(FSL_EIS_MAS0, config->MAS0.R);
0159   PPC_SET_SPECIAL_PURPOSE_REGISTER(FSL_EIS_MAS1, config->MAS1.R);
0160   PPC_SET_SPECIAL_PURPOSE_REGISTER(FSL_EIS_MAS2, config->MAS2.R);
0161   PPC_SET_SPECIAL_PURPOSE_REGISTER(FSL_EIS_MAS3, config->MAS3.R);
0162   __asm__ volatile ("tlbwe");
0163 }
0164
0165 #ifdef __cplusplus
0166 }
0167 #endif /* __cplusplus */
0168
0169 #endif /* LIBCPU_POWERPC_MPC55XX_H */