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File indexing completed on 2025-05-11 08:23:54 

0001 /* SPDX-License-Identifier: BSD-2-Clause */
0002 
0003 /**
0004  * @file
0005  *
0006  * @ingroup RTEMSBSPsPowerPCMPC55XX
0007  *
0008  * @brief Enhanced Modular Input Output Subsystem (eMIOS).
0009  */
0010 
0011 /*
0012  * Copyright (C) 2009, 2011 embedded brains GmbH & Co. KG
0013  *
0014  * Redistribution and use in source and binary forms, with or without
0015  * modification, are permitted provided that the following conditions
0016  * are met:
0017  * 1. Redistributions of source code must retain the above copyright
0018  *    notice, this list of conditions and the following disclaimer.
0019  * 2. Redistributions in binary form must reproduce the above copyright
0020  *    notice, this list of conditions and the following disclaimer in the
0021  *    documentation and/or other materials provided with the distribution.
0022  *
0023  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
0024  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
0025  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
0026  * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
0027  * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
0028  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
0029  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
0030  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
0031  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
0032  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
0033  * POSSIBILITY OF SUCH DAMAGE.
0034  */
0035 
0036 #ifndef LIBCPU_POWERPC_MPC55XX_EMIOS_H
0037 #define LIBCPU_POWERPC_MPC55XX_EMIOS_H
0038 
0039 #include <mpc55xx/regs.h>
0040 
0041 #ifdef __cplusplus
0042 extern "C" {
0043 #endif /* __cplusplus */
0044 
0045 #ifdef MPC55XX_HAS_EMIOS
0046 
0047 /**
0048  * @name eMIOS - Modes
0049  *
0050  * @{
0051  */
0052 
0053 #define MPC55XX_EMIOS_MODE_GPIO_INPUT 0U
0054 #define MPC55XX_EMIOS_MODE_GPIO_OUTPUT 1U
0055 #define MPC55XX_EMIOS_MODE_SAIC 2U
0056 #define MPC55XX_EMIOS_MODE_SAOC 3U
0057 #define MPC55XX_EMIOS_MODE_IPWM 4U
0058 #define MPC55XX_EMIOS_MODE_IPM 5U
0059 #define MPC55XX_EMIOS_MODE_DAOC_SECOND 6U
0060 #define MPC55XX_EMIOS_MODE_DAOC_BOTH 7U
0061 #define MPC55XX_EMIOS_MODE_PEA_ACCU_CONT 8U
0062 #define MPC55XX_EMIOS_MODE_PEA_ACCU_SINGLE 9U
0063 #define MPC55XX_EMIOS_MODE_PEA_COUNT_CONT 10U
0064 #define MPC55XX_EMIOS_MODE_PEA_COUNT_SINGLE 11U
0065 #define MPC55XX_EMIOS_MODE_QDEC_COUNT_DIR 12U
0066 #define MPC55XX_EMIOS_MODE_QDEC_PHASE 13U
0067 #define MPC55XX_EMIOS_MODE_WPTA 14U
0068 #define MPC55XX_EMIOS_MODE_RESERVED_15 15U
0069 #define MPC55XX_EMIOS_MODE_MC_UP_INT_CLK 16U
0070 #define MPC55XX_EMIOS_MODE_MC_UP_EXT_CLK 17U
0071 #define MPC55XX_EMIOS_MODE_RESERVED_18 18U
0072 #define MPC55XX_EMIOS_MODE_RESERVED_19 19U
0073 #define MPC55XX_EMIOS_MODE_MC_UP_DOWN_INT_CLK 20U
0074 #define MPC55XX_EMIOS_MODE_MC_UP_DOWN_EXT_CLK 21U
0075 #define MPC55XX_EMIOS_MODE_MC_UP_DOWN_CHANGE_INT_CLK 22U
0076 #define MPC55XX_EMIOS_MODE_MC_UP_DOWN_CHANGE_EXT_CLK 23U
0077 #define MPC55XX_EMIOS_MODE_OPWFM_B_IMMEDIATE 24U
0078 #define MPC55XX_EMIOS_MODE_OPWFM_B_NEXT_PERIOD 25U
0079 #define MPC55XX_EMIOS_MODE_OPWFM_AB_IMMEDIATE 26U
0080 #define MPC55XX_EMIOS_MODE_OPWFM_AB_NEXT_PERIOD 27U
0081 #define MPC55XX_EMIOS_MODE_OPWMC_TRAIL_TRAIL 28U
0082 #define MPC55XX_EMIOS_MODE_OPWMC_TRAIL_LEAD 29U
0083 #define MPC55XX_EMIOS_MODE_OPWMC_BOTH_TRAIL 30U
0084 #define MPC55XX_EMIOS_MODE_OPWMC_BOTH_LEAD 31U
0085 #define MPC55XX_EMIOS_MODE_OPWM_B_IMMEDIATE 32U
0086 #define MPC55XX_EMIOS_MODE_OPWM_B_NEXT_PERIOD 33U
0087 #define MPC55XX_EMIOS_MODE_OPWM_AB_IMMEDIATE 34U
0088 #define MPC55XX_EMIOS_MODE_OPWM_AB_NEXT_PERIOD 35U
0089 #define MPC55XX_EMIOS_MODE_RESERVED_36 36U
0090 #define MPC55XX_EMIOS_MODE_RESERVED_37 37U
0091 #define MPC55XX_EMIOS_MODE_RESERVED_38 38U
0092 #define MPC55XX_EMIOS_MODE_RESERVED_39 39U
0093 #define MPC55XX_EMIOS_MODE_RESERVED_40 40U
0094 #define MPC55XX_EMIOS_MODE_RESERVED_41 41U
0095 #define MPC55XX_EMIOS_MODE_RESERVED_42 42U
0096 #define MPC55XX_EMIOS_MODE_RESERVED_43 43U
0097 #define MPC55XX_EMIOS_MODE_RESERVED_44 44U
0098 #define MPC55XX_EMIOS_MODE_RESERVED_45 45U
0099 #define MPC55XX_EMIOS_MODE_RESERVED_46 46U
0100 #define MPC55XX_EMIOS_MODE_RESERVED_47 47U
0101 #define MPC55XX_EMIOS_MODE_RESERVED_48 48U
0102 #define MPC55XX_EMIOS_MODE_RESERVED_49 49U
0103 #define MPC55XX_EMIOS_MODE_RESERVED_50 50U
0104 #define MPC55XX_EMIOS_MODE_RESERVED_51 51U
0105 #define MPC55XX_EMIOS_MODE_RESERVED_52 52U
0106 #define MPC55XX_EMIOS_MODE_RESERVED_53 53U
0107 #define MPC55XX_EMIOS_MODE_RESERVED_54 54U
0108 #define MPC55XX_EMIOS_MODE_RESERVED_55 55U
0109 #define MPC55XX_EMIOS_MODE_RESERVED_56 56U
0110 #define MPC55XX_EMIOS_MODE_RESERVED_57 57U
0111 #define MPC55XX_EMIOS_MODE_RESERVED_58 58U
0112 #define MPC55XX_EMIOS_MODE_RESERVED_59 59U
0113 #define MPC55XX_EMIOS_MODE_RESERVED_60 60U
0114 #define MPC55XX_EMIOS_MODE_RESERVED_61 61U
0115 #define MPC55XX_EMIOS_MODE_RESERVED_62 62U
0116 #define MPC55XX_EMIOS_MODE_RESERVED_63 63U
0117 #define MPC55XX_EMIOS_MODE_RESERVED_64 64U
0118 #define MPC55XX_EMIOS_MODE_RESERVED_65 65U
0119 #define MPC55XX_EMIOS_MODE_RESERVED_66 66U
0120 #define MPC55XX_EMIOS_MODE_RESERVED_67 67U
0121 #define MPC55XX_EMIOS_MODE_RESERVED_68 68U
0122 #define MPC55XX_EMIOS_MODE_RESERVED_69 69U
0123 #define MPC55XX_EMIOS_MODE_RESERVED_70 70U
0124 #define MPC55XX_EMIOS_MODE_RESERVED_71 71U
0125 #define MPC55XX_EMIOS_MODE_RESERVED_72 72U
0126 #define MPC55XX_EMIOS_MODE_RESERVED_73 73U
0127 #define MPC55XX_EMIOS_MODE_RESERVED_74 74U
0128 #define MPC55XX_EMIOS_MODE_RESERVED_75 75U
0129 #define MPC55XX_EMIOS_MODE_RESERVED_76 76U
0130 #define MPC55XX_EMIOS_MODE_RESERVED_77 77U
0131 #define MPC55XX_EMIOS_MODE_RESERVED_78 78U
0132 #define MPC55XX_EMIOS_MODE_RESERVED_79 79U
0133 #define MPC55XX_EMIOS_MODE_MCB_UP_INT_CLK 80U
0134 #define MPC55XX_EMIOS_MODE_MCB_UP_EXT_CLK 81U
0135 #define MPC55XX_EMIOS_MODE_RESERVED_82 82U
0136 #define MPC55XX_EMIOS_MODE_RESERVED_83 83U
0137 #define MPC55XX_EMIOS_MODE_MCB_UP_DOWN_ONE_INT_CLK 84U
0138 #define MPC55XX_EMIOS_MODE_MCB_UP_DOWN_ONE_EXT_CLK 85U
0139 #define MPC55XX_EMIOS_MODE_MCB_UP_DOWN_BOTH_INT_CLK 86U
0140 #define MPC55XX_EMIOS_MODE_MCB_UP_DOWN_BOTH_EXT_CLK 87U
0141 #define MPC55XX_EMIOS_MODE_OPWFMB_B 88U
0142 #define MPC55XX_EMIOS_MODE_RESERVED_89 89U
0143 #define MPC55XX_EMIOS_MODE_OPWFMB_AB 90U
0144 #define MPC55XX_EMIOS_MODE_RESERVED_91 91U
0145 #define MPC55XX_EMIOS_MODE_OPWMCB_TRAIL_TRAIL 92U
0146 #define MPC55XX_EMIOS_MODE_OPWMCB_TRAIL_LEAD 93U
0147 #define MPC55XX_EMIOS_MODE_OPWMCB_BOTH_TRAIL 94U
0148 #define MPC55XX_EMIOS_MODE_OPWMCB_BOTH_LEAD 95U
0149 #define MPC55XX_EMIOS_MODE_OPWMB_SECOND 96U
0150 #define MPC55XX_EMIOS_MODE_RESERVED_97 97U
0151 #define MPC55XX_EMIOS_MODE_OPWMB_BOTH 98U
0152 #define MPC55XX_EMIOS_MODE_RESERVED_99 99U
0153 #define MPC55XX_EMIOS_MODE_RESERVED_100 100U
0154 #define MPC55XX_EMIOS_MODE_RESERVED_101 101U
0155 #define MPC55XX_EMIOS_MODE_RESERVED_102 102U
0156 #define MPC55XX_EMIOS_MODE_RESERVED_103 103U
0157 #define MPC55XX_EMIOS_MODE_RESERVED_104 104U
0158 #define MPC55XX_EMIOS_MODE_RESERVED_105 105U
0159 #define MPC55XX_EMIOS_MODE_RESERVED_106 106U
0160 #define MPC55XX_EMIOS_MODE_RESERVED_107 107U
0161 #define MPC55XX_EMIOS_MODE_RESERVED_108 108U
0162 #define MPC55XX_EMIOS_MODE_RESERVED_109 109U
0163 #define MPC55XX_EMIOS_MODE_RESERVED_110 110U
0164 #define MPC55XX_EMIOS_MODE_RESERVED_111 111U
0165 #define MPC55XX_EMIOS_MODE_RESERVED_112 112U
0166 #define MPC55XX_EMIOS_MODE_RESERVED_113 113U
0167 #define MPC55XX_EMIOS_MODE_RESERVED_114 114U
0168 #define MPC55XX_EMIOS_MODE_RESERVED_115 115U
0169 #define MPC55XX_EMIOS_MODE_RESERVED_116 116U
0170 #define MPC55XX_EMIOS_MODE_RESERVED_117 117U
0171 #define MPC55XX_EMIOS_MODE_RESERVED_118 118U
0172 #define MPC55XX_EMIOS_MODE_RESERVED_119 119U
0173 #define MPC55XX_EMIOS_MODE_RESERVED_120 120U
0174 #define MPC55XX_EMIOS_MODE_RESERVED_121 121U
0175 #define MPC55XX_EMIOS_MODE_RESERVED_122 122U
0176 #define MPC55XX_EMIOS_MODE_RESERVED_123 123U
0177 #define MPC55XX_EMIOS_MODE_RESERVED_124 124U
0178 #define MPC55XX_EMIOS_MODE_RESERVED_125 125U
0179 #define MPC55XX_EMIOS_MODE_RESERVED_126 126U
0180 #define MPC55XX_EMIOS_MODE_RESERVED_127 127U
0181 
0182 /** @} */
0183 
0184 #if MPC55XX_CHIP_FAMILY == 566 || MPC55XX_CHIP_FAMILY == 567
0185   #define MPC55XX_EMIOS_CHANNEL_NUMBER 32U
0186 #else
0187   #define MPC55XX_EMIOS_CHANNEL_NUMBER 24U
0188 #endif
0189 
0190 #define MPC55XX_EMIOS_VALUE_MAX 0x00ffffffU
0191 
0192 #define MPC55XX_EMIOS_IS_CHANNEL_VALID( c) \
0193   ((unsigned) (c) < MPC55XX_EMIOS_CHANNEL_NUMBER)
0194 
0195 #define MPC55XX_EMIOS_IS_CHANNEL_INVALID( c) \
0196   (!MPC55XX_EMIOS_IS_CHANNEL_VALID( c))
0197 
0198 void mpc55xx_emios_initialize( unsigned prescaler);
0199 
0200 unsigned mpc55xx_emios_global_prescaler( void);
0201 
0202 void mpc55xx_emios_set_global_prescaler( unsigned prescaler);
0203 
0204 #endif /* MPC55XX_HAS_EMIOS */
0205 
0206 #ifdef __cplusplus
0207 }
0208 #endif /* __cplusplus */
0209 
0210 #endif /* LIBCPU_POWERPC_MPC55XX_EMIOS_H */
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