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File indexing completed on 2025-05-11 08:23:54

0001 /*
0002  * @file
0003  * @ingroup powerpc_motorola_powerpc
0004  * @brief Implementations for interrupt mechanisms for Time Test 27
0005  */
0006 
0007 /*
0008  *  The license and distribution terms for this file may be
0009  *  found in the file LICENSE in this distribution or at
0010  *  http://www.rtems.org/license/LICENSE.
0011  */
0012 
0013 #ifndef _RTEMS_TMTEST27
0014 #error "This is an RTEMS internal file you must not include directly."
0015 #endif
0016 
0017 #ifndef __tm27_h
0018 #define __tm27_h
0019 
0020 /*
0021  *  Stuff for Time Test 27
0022  */
0023 
0024 #include <bsp/irq.h>
0025 
0026 #define MUST_WAIT_FOR_INTERRUPT 1
0027 
0028 static void null_irq_enable(const rtems_irq_connect_data* a) { (void) a; }
0029 static void null_irq_disable(const rtems_irq_connect_data* a) { (void) a; }
0030 static int null_irq_is_enabled(const rtems_irq_connect_data* a) { (void) a; return 0; }
0031 
0032 static rtems_irq_connect_data clockIrqData =
0033 {
0034  .name = BSP_DECREMENTER,
0035  .hdl = 0,
0036  .handle = 0,
0037  .on = null_irq_enable,
0038  .off = null_irq_disable,
0039  .isOn = null_irq_is_enabled
0040 };
0041 
0042 static inline void Install_tm27_vector( rtems_interrupt_handler handler )
0043 {
0044   clockIrqData.hdl = handler;
0045   if (!BSP_install_rtems_irq_handler (&clockIrqData)) {
0046     printk("Error installing clock interrupt handler!\n");
0047     rtems_fatal_error_occurred(1);
0048   }
0049 }
0050 
0051 #define Cause_tm27_intr()  \
0052   do { \
0053     uint32_t   _clicks = 8; \
0054     __asm__ volatile( "mtdec %0" : "=r" ((_clicks)) : "r" ((_clicks)) ); \
0055   } while (0)
0056 
0057 #define Clear_tm27_intr() \
0058   do { \
0059     uint32_t   _clicks = 0xffffffff; \
0060     __asm__ volatile( "mtdec %0" : "=r" ((_clicks)) : "r" ((_clicks)) ); \
0061   } while (0)
0062 
0063 #define Lower_tm27_intr() \
0064   do { \
0065     uint32_t   _msr = 0; \
0066     _ISR_Set_level( 0 ); \
0067     __asm__ volatile( "mfmsr %0 ;" : "=r" (_msr) : "r" (_msr) ); \
0068     _msr |=  0x8002; \
0069     __asm__ volatile( "mtmsr %0 ;" : "=r" (_msr) : "r" (_msr) ); \
0070   } while (0)
0071 
0072 #endif