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0001 MCP750
0002 ======
0003 ```
0004 BSP NAME: MCP750
0005 BOARD: MCP750 from motorola
0006 BUS: PCI
0007 CPU FAMILY: ppc
0008 CPU: PowerPC 750
0009 COPROCESSORS: N/A
0010 MODE: 32 bit mode
0011
0012 DEBUG MONITOR: PPCBUG mode
0013 ```
0014
0015 PERIPHERALS
0016 -----------
0017 ```
0018 TIMERS: PPC internal Timebase register
0019 RESOLUTION: ???
0020 SERIAL PORTS: simulated via bug
0021 REAL-TIME CLOCK: PPC internal Decrementer register
0022 DMA: none
0023 VIDEO: none
0024 SCSI: none
0025 NETWORKING: DEC21140
0026 ```
0027
0028 DRIVER INFORMATION
0029 ------------------
0030 ```
0031 CLOCK DRIVER: PPC internal
0032 IOSUPP DRIVER: N/A
0033 SHMSUPP: N/A
0034 TIMER DRIVER: PPC internal
0035 TTY DRIVER: PPC internal
0036 ```
0037
0038 STDIO
0039 -----
0040 ```
0041 PORT: Console port 0
0042 ELECTRICAL: na
0043 BAUD: na
0044 BITS PER CHARACTER: na
0045 PARITY: na
0046 STOP BITS: na
0047 ```
0048
0049 Notes
0050 -----
0051 Based on papyrus bsp which only really supports
0052 the PowerOpen ABI with an ELF assembler.
0053
0054
0055
0056 Booting
0057 =======
0058
0059 This file documents the on board monitor (PPCBUG) configuration used
0060 to be able to boot the archives located in powerpc-rtems/c/mcp750/bin.
0061 This information was provided by Eric Valette <valette@crf.canon.fr>
0062
0063 NOTE (by Till Straumann <strauman@slac.stanford.edu>, 2003):
0064 Apparently, PPCBug fails to shut down the network interface after
0065 loading an image. This means that the ethernet chip is still able
0066 to write into its descriptors and network buffer memory which
0067 can result in the loaded system to be corrupted if that system
0068 relocates itself!. The proper place to shut down the interface
0069 would be PPCBug itself or a 'PPCBug startup script' - unfortunately,
0070 PPCBug doesn't offer such a feature. Therefore, the bootloader
0071 is by default compiled with the
0072 #ifdef USE_PPCBUG
0073 compile-time option ENABLED. It will then use a PPCBug system
0074 call to shut down the ethernet chip during an early stage of
0075 the boot process.
0076 NOTE: THIS (i.e. the system call) WILL FAIL IF YOU USE SOFTWARE
0077 OTHER THAN PPCBUG TO BOOT THE BSP. In such a case, you must
0078 recompile with #undef USE_PPCBUG and make sure the ethernet
0079 interface is quiet by other means.
0080
0081 ```shell
0082 ----------------------- ENV command--------------
0083 PPC1-Bug>env
0084 Bug or System environment [B/S] = B?
0085 Field Service Menu Enable [Y/N] = N?
0086 Probe System for Supported I/O Controllers [Y/N] = Y?
0087 Auto-Initialize of NVRAM Header Enable [Y/N] = Y?
0088 Network PReP-Boot Mode Enable [Y/N] = Y? <====================
0089 SCSI Bus Reset on Debugger Startup [Y/N] = N?
0090 Primary SCSI Bus Negotiations Type [A/S/N] = A?
0091 Primary SCSI Data Bus Width [W/N] = N?
0092 Secondary SCSI Identifier = "07"?
0093 NVRAM Boot List (GEV.fw-boot-path) Boot Enable [Y/N] = Y?
0094 NVRAM Boot List (GEV.fw-boot-path) Boot at power-up only [Y/N] = Y?
0095 NVRAM Boot List (GEV.fw-boot-path) Boot Abort Delay = 5?
0096 Auto Boot Enable [Y/N] = Y?
0097 Auto Boot at power-up only [Y/N] = Y?
0098 Auto Boot Scan Enable [Y/N] = Y?
0099 Auto Boot Scan Device Type List = FDISK/CDROM/TAPE/HDISK/?
0100 Auto Boot Controller LUN = 14?
0101 Auto Boot Device LUN = 40?
0102 Auto Boot Partition Number = 03?
0103 Auto Boot Abort Delay = 7?
0104 Auto Boot Default String [NULL for an empty string] = ?
0105 ROM Boot Enable [Y/N] = N?
0106 ROM Boot at power-up only [Y/N] = Y?
0107 ROM Boot Abort Delay = 5?
0108 ROM Boot Direct Starting Address = FFF00000?
0109 ROM Boot Direct Ending Address = FFFFFFFC?
0110 Network Auto Boot Enable [Y/N] = N?
0111 Network Auto Boot at power-up only [Y/N] = N?
0112 Network Auto Boot Controller LUN = 00?
0113 Network Auto Boot Device LUN = 00?
0114 Network Auto Boot Abort Delay = 5?
0115 Network Auto Boot Configuration Parameters Offset (NVRAM) = 00001000?
0116 Memory Size Enable [Y/N] = Y?
0117 Memory Size Starting Address = 00000000?
0118 Memory Size Ending Address = 02000000?
0119 DRAM Speed in NANO Seconds = 60?
0120 ROM First Access Length (0 - 31) = 10?
0121 ROM Next Access Length (0 - 15) = 0?
0122 DRAM Parity Enable [On-Detection/Always/Never - O/A/N] = O?
0123 L2Cache Parity Enable [On-Detection/Always/Never - O/A/N] = O?
0124 PCI Interrupts Route Control Registers (PIRQ0/1/2/3) = 0A050000?
0125 Serial Startup Code Master Enable [Y/N] = N?
0126 Serial Startup Code LF Enable [Y/N] = N?
0127 ---------------------NIOT ---------------------------
0128 PPC1-Bug>niot
0129 Controller LUN =00?
0130 Device LUN =00?
0131 Node Control Memory Address =03F9E000?
0132 Client IP Address =194.2.81.157?
0133 Server IP Address =194.2.81.241?
0134 Subnet IP Address Mask =255.255.255.0?
0135 Broadcast IP Address =255.255.255.255?
0136 Gateway IP Address =194.2.81.254?
0137 Boot File Name ("NULL" for None) =debug-ppc?
0138 Argument File Name ("NULL" for None) =?
0139 Boot File Load Address =001F0000?
0140 Boot File Execution Address =001F0000?
0141 Boot File Execution Delay =00000000?
0142 Boot File Length =00000000?
0143 Boot File Byte Offset =00000000?
0144 BOOTP/RARP Request Retry =05?
0145 TFTP/ARP Request Retry =05?
0146 Trace Character Buffer Address =00000000?
0147 BOOTP/RARP Request Control: Always/When-Needed (A/W)=W?
0148 BOOTP/RARP Reply Update Control: Yes/No (Y/N) =Y?
0149 --------------------------------------------------------
0150 ```
0151
0152
0153 QEMU
0154 ====
0155 The 'qemuprep'/'qemuprep-altivec' BSPs are variants of
0156 'motorola_powerpc' that can run under QEMU. They are *not*
0157 binary compatible with other variants of 'motorola_powerpc'
0158 (nor with each other).
0159
0160 Most significant differences to real hardware:
0161 - no OpenPIC, just a 8259 PIC (even though qemu implements an openpic
0162 at least to some extent it is not configured into the prep platform
0163 as of qemu-0.14.1).
0164 - no VME (absense of the VME controller is detected by the BSP)
0165 - the only network chip supported by both, qemu and vanilla RTEMS
0166 is the ISA NE2000 controller. Note that the default interrupt line
0167 settings used by RTEMS and QEMU differ: RTEMS uses 5 and QEMU 9.
0168 This can be addressed by passing a RTEMS commandline option
0169 --ne2k-irq=9.
0170 Other controllers (i8559, e1000, pcnet) implemented by qemu can
0171 also be used but require unbundled RTEMS drivers (libbsdport).
0172 Note that the bundled 'if_fxp' has not been ported to PPC and works
0173 on x86 only.
0174 - unlike a real motorola board you can run qemu emulating a 7400 CPU
0175 which features altivec. I.e., you can use this BSP (altivec-enabled
0176 variant) to test altivec-enabled code.
0177
0178 Compatibility: qemu had quite a few bugs related to the PREP platform.
0179 Version 0.12.4, for example, required patches. 0.14.1 seems to have
0180 fixed the show-stoppers. Hence, you *need* at least qemu-0.14.1 for
0181 this BSP; it should work without the need for patching QEMU.
0182
0183 BIOS: qemu requires you to use a BIOS. The one that came with qemu
0184 0.12.4 didn't work for me so I created a minimal dummy that provides
0185 enough functionality for the RTEMS bootloader to work.
0186
0187 BSP Variants:
0188 You can compile the BSP for either a 604 CPU or a 7400 (altivec-enabled).
0189 Note that you cannot run the altivec-enabled BSP variant on a CPU w/o
0190 altivec/SIMD hardware. The non-altivec variant is called 'qemuprep'
0191 and the altivec-enabled one 'qemuprep-altivec'. Hence, you can
0192 configure RTEMS:
0193
0194 604/non-altivec variant only:
0195
0196 ```shell
0197 configure --target=powerpc-rtems --enable-rtemsbsp=qemuprep
0198 ```
0199
0200 7400/altivec variant only:
0201 ```shell
0202 configure --target=powerpc-rtems --enable-rtemsbsp=qemuprep-altivec
0203 ```
0204
0205 both variants:
0206 ```shell
0207 configure --target=powerpc-rtems --enable-rtemsbsp='qemuprep qemuprep-altivec'
0208 ``
0209 Building QEMU:
0210 In case you have no pre-built qemu-0.14.1 you can
0211 compile it yourself:
0212
0213 cd qemu-0.14.1
0214 configure --target-list=ppc-softmmu
0215 make
0216
0217 Running QEMU:
0218 A number of command-line options are important (BTW: make sure
0219 you run the PPC/PREP emulator and not a natively installed i386/PC
0220 emulating 'qemu')
0221
0222 ```
0223 -M prep --- select machine type: prep
0224 -cpu 604 --- select 604 CPU for non-altivec variant
0225 -cpu 7400 --- select 7400 CPU for altivec variant
0226
0227 NOTE: the 7455 and 7457 emulations are buggy as of
0228 qemu-0.14.1 and they won't work.
0229
0230 -bios <rtems-install-prefix>/powerpc-rtems/qemuprep/qemu_fakerom.bin
0231 -bios <rtems-install-prefix>/powerpc-rtems/qemuprep-altivec/qemu_fakerom.bin
0232 --- select proprietary dummy 'BIOS'
0233
0234 -nographic --- redirect serial/IO to console where qemu is run
0235
0236 -kernel <path> --- path to your RTEMS executable (.ralf file, e.g., 'hello.ralf')
0237 -no-reboot --- terminate after one run
0238 -append <arg> --- RTEMS kernel comand line (use e.g., to modify
0239 ne2000 driver interrupt line)
0240 ```
0241
0242 Networking
0243 ----------
0244 (We assume your RTEMS application is correctly configured and
0245 built for networking using the ne2k adapter [other adapters
0246 can be used with unbundled/libbsdport drivers])
0247
0248 I use networking with a 'tap' interface on the host machine
0249 and can then communicate with the emulated target in any
0250 desired way. The Ethernet address specified in the RTEMS network interface
0251 configuration and the Qemu command line must match, otherwise uni-cast frames
0252 are not received. It is best to use a NULL pointer in the RTEMS network
0253 interface configuration for the Ethernet address, so that the default from Qemu
0254 is used. Make sure that your firewall settings allow communication between
0255 different Qemu instances and your host.
0256
0257 Linux
0258 -----
0259
0260 # create a 'permanent' tap device that can be used by myself
0261 # (as non-root user).
0262 sudo tunctl -u `id -u`
0263 # configure tap0 interface
0264 sudo ifconfig tap0 10.1.1.1 netmask 255.255.255.0 up
0265 # provide a suitable dhcpd config file (for the emulated
0266 # platform to boot: IP address etc.
0267 #
0268 # execute dhcp on host
0269 sudo dhcpd -d tap0
0270
0271 Start emulated prep platform:
0272
0273 ```shell
0274 ppc-softmmu/qemu-system-ppc \
0275 -M prep \
0276 -cpu 7400 \
0277 -bios <rtems-prefix>/powerpc-rtems/qemuprep-altivec/lib/qemu_fakerom.bin \
0278 -kernel <my_path>/my_app.ralf \
0279 -append --ne2k-irq=9 \
0280 -nographic \
0281 -no-reboot \
0282 -net nic,model=ne2k_isa \
0283 -net tap,vlan=0,ifname=tap0,script=no,downscript=no
0284 ```
0285 Again: if you use the non-altivec BSP variant, use -cpu 604
0286 and if you use the altivec-enabled variant then you MUST use
0287 -cpu 7400.
0288
0289 Have fun.
0290
0291 Till Straumann, 2011/07/18
0292
0293
0294 dec21140
0295 ========
0296 The dec21140 network driver is found in libchip/networking.
0297
0298
0299 mtx603e
0300 =======
0301 ```
0302 BSP NAME: mtx603e
0303 BOARD: MTX-60X boards from motorola
0304 BUS: PCI, W83C554
0305 CPU FAMILY: ppc
0306 CPU: PowerPC 603e
0307 COPROCESSORS: N/A
0308 MODE: 32 bit mode
0309
0310 DEBUG MONITOR: PPCBUG mode
0311 ```
0312
0313 PERIPHERALS
0314 -----------
0315 ```
0316 TIMERS: PPC internal Timebase register
0317 RESOLUTION: ???
0318 SERIAL PORTS: simulated via bug
0319 REAL-TIME CLOCK: PPC internal Decrementer register
0320 DMA: none
0321 VIDEO: none
0322 SCSI: none
0323 NETWORKING: DEC21140
0324 ```
0325
0326
0327 DRIVER INFORMATION
0328 ------------------
0329 ```
0330 CLOCK DRIVER: PPC internal
0331 IOSUPP DRIVER: N/A
0332 SHMSUPP: N/A
0333 TIMER DRIVER: PPC internal
0334 TTY DRIVER: PPC internal
0335 ```
0336
0337
0338 STDIO
0339 -----
0340 ```
0341 PORT: Console port 0
0342 ELECTRICAL: na
0343 BAUD: na
0344 BITS PER CHARACTER: na
0345 PARITY: na
0346 STOP BITS: na
0347 ```
0348
0349 Notes
0350 -----
0351
0352 This bsp is an instantiation of the generic motorola_powerpc BSP. It is
0353 "virtual" in the sense it does not supply any per-bsp files. Instead,
0354 it is defined by the aclocal and make/custom config files which supply
0355 #defines that adapt the shared powerpc code. This is seen in the
0356 bootloader and irq setup files.
0357
0358 Although created for a MTX-603e board, this bsp should be readily
0359 portable to any of the Motorola MTX boards, and has in fact run on a
0360 MCP750 board.
0361
0362 Some MTX boards have multiple processors, at this time RTEMS does not
0363 support SMP and there is no internal awareness of the architecture.
0364
0365
0366
0367 MVME2100
0368 ========
0369 The MVME2100 is a Motorola VMEbus board which is similar to the other
0370 Motorola PowerPC boards supported by this BSP. But it does not support
0371 the Motorola CPU Configuration Register. This makes it impossible to
0372 dynamically probe and determine that you are executing on this board
0373 variant. So this BSP variant must be explicitly built to only support
0374 the MVME2100. The complete list of differences found so far is:
0375
0376 * No CPU Configuration Register
0377 * one COM port
0378 * COM port is on PCI IRQ not ISA IRQ
0379 * limited on RAM (32 or 64 MB)
0380 * uses the EPIC interrupt controller on the MPC8240
0381 * does not have an ISA bus but has an ISA I/O address space
0382 * cannot set DBAT2 in bspstart like other variants because
0383 there are PCI/ISA Interrupt Acknowledge registers at this space
0384 This BSP may have left some PCI memory uncovered
0385 * PPCBug starts programs with vectors still in ROM
0386
0387 Supported Features:
0388 - Interrupt driven console using termios
0389 - Network device driver
0390 - Real-Time Clock driver
0391 - Clock Tick Device Driver
0392
0393 Things to address:
0394 - Does not return to monitor
0395 - Level 1 cache is disabled for now
0396 - Check on trying to read CPU Configuration Register for CHRP/Prep for PCI
0397 and report a failure if in the wrong mode. May be able to set the model
0398 but it may be hard to test if we break PPCBug.
0399 - Use NVRAM for network configuration information
0400
0401 BSP Features Not Implemented:
0402 - VMEbus mapped in but untested
0403 - OpenPIC features not required for BSP are not supported
0404
0405 Memory Map
0406 ----------
0407 ```
0408 BAT Mapping
0409
0410 ffff ffff |------------------------------------| ----- ffff ffff
0411 | ROM/FLASH Bank 0 | |
0412 fff0 0000 |------------------------------------| |
0413 | System I/O | |
0414 ffe0 0000 |------------------------------------| |
0415 | Replicated ROM/FLASH Bank 0 | |
0416 | Replicated System I/O | |
0417 ff80 0000 |------------------------------------| |
0418 | ROM/FLASH Bank 1 | DBAT3
0419 ff00 0000 |------------------------------------| - Supervisor R/W
0420 | PCI Interrupt Acknowledge | - Cache Inhibited
0421 fef0 0000 |------------------------------------| - Guarded
0422 | PCI Configuration Data Register | |
0423 fee0 0000 |------------------------------------| |
0424 | PCI Configuration Address Register | |
0425 fec0 0000 |------------------------------------| |
0426 | PCI I/O Space | |
0427 fe80 0000 |------------------------------------| |
0428 | PCI/ISA I/O Space | |
0429 fe00 0000 |------------------------------------| |
0430 | PCI/ISA Memory Space | |
0431 fd00 0000 |------------------------------------| |
0432 | | |
0433 | xxxxxxxxxxxxxx| ----- f000 0000
0434 | x not mapped | |
0435 | xxxxxxxxxxxxxx| ----- a000 0000
0436 | | |
0437 | | |
0438 | | DBAT0
0439 | | - Supervisor R/W
0440 | | - Cache Inhibited
0441 | | - Guarded
0442 | | |
0443 | | |
0444 | | ----- 9000 0000
0445 | | |
0446 | | |
0447 | PCI Memory Space | DBAT2
0448 | | - Supervisor R/W
0449 | | - Cache Inhibited
0450 | | - Guarded
0451 | | |
0452 | | |
0453 | | |
0454 8000 0000 |------------------------------------| ----- 8000 0000
0455 | x |
0456 | x not mapped |
0457 | Reserved xxxxxxxxxxxxxx| ----- 1000 0000
0458 | | |
0459 | | |
0460 0200 0000 |------------------------------------| |
0461 | | |
0462 | | |
0463 | | |
0464 | | |
0465 | DRAM (32MB) | DBAT1/IBAT1
0466 | | - Supervisor R/W
0467 | | |
0468 | | |
0469 | | |
0470 | | |
0471 0000 0000 |------------------------------------| ----- 0000 0000
0472 ```
0473
0474
0475 TTCP Performance on First Day Run
0476 ---------------------------------
0477 Fedora Core 1 on (according to /proc/cpuinfo) a 300 Mhz P3 using Netgear
0478 10/100 CardBus NIC on a dedicated 10BaseT LAN.
0479
0480 ```
0481 ON MVME2100: ttcp -t -s 192.168.2.107
0482 REPORTED ON MVME2100:
0483 ttcp-t: buflen=8192, nbuf=2048, align=16384/0, port=5001 tcp -> 192.168.2.107
0484 ttcp-t: socket
0485 ttcp-t: connect
0486 ttcp-t: 16777216 bytes in 20.80 real seconds = 787.69 KB/sec +++
0487 ttcp-t: 2048 I/O calls, msec/call = 10.40, calls/sec = 98.46
0488 ttcp-t: 0.0user 20.8sys 0:20real 100% 0i+0d 0maxrss 0+0pf 0+0csw
0489
0490 ON MVME2100: ttcp -t -s 192.168.2.107
0491 REPORTED ON MVME2100:
0492 ttcp -r -s
0493 ttcp-r: buflen=8192, nbuf=2048, align=16384/0, port=5001 tcp
0494 ttcp-r: socket
0495 ttcp-r: accept from 192.168.2.107
0496 ttcp-r: 16777216 bytes in 15.41 real seconds = 1063.21 KB/sec +++
0497 ttcp-r: 11588 I/O calls, msec/call = 1.36, calls/sec = 751.98
0498 ttcp-r: 0.0user 15.4sys 0:15real 100% 0i+0d 0maxrss 0+0pf 0+0csw
0499 ```
0500
0501
0502 MVME2300
0503 ========
0504 This BSP was adapted from Eric Valette MCP750 Generic motorola
0505 port to MVME2300 by Jay Kulpinski <jskulpin@eng01.gdds.com>.
0506 In other to work correctly, the Tundra Universe chip must
0507 be turned off using PPCBug as explained below.
0508
0509 The Tundra Universe chip is a bridge between the PCI and VME buses.
0510 It has four programmable mapping windows in each direction, much like
0511 the Raven. PPCBUG lets you specify the mappings if you don't want
0512 to do it in your application. The mappings on our board, which may
0513 or not be the default Motorola mappings, had one window appearing
0514 at 0x01000000 in PCI space. This is the same place the bootloader
0515 code remapped the Raven registers. The windows' mappings are
0516 very likely to be application specific, so I wouldn't worry too
0517 much about setting them in the BSP, but it would be nice to have
0518 a standard interface to do so. Whoever needs that first can
0519 incorporate the ppcn_60x BSP code for the Universe chip. :-)
0520
0521 These options in PPCBUG's ENV command did the job:
0522
0523 ```
0524 VME3PCI Master Master Enable [Y/N] = Y?
0525 PCI Slave Image 0 Control = 00000000? <-----
0526 PCI Slave Image 0 Base Address Register = 00000000?
0527 PCI Slave Image 0 Bound Address Register = 00000000?
0528 PCI Slave Image 0 Translation Offset = 00000000?
0529 PCI Slave Image 1 Control = 00000000? <-----
0530 PCI Slave Image 1 Base Address Register = 01000000?
0531 PCI Slave Image 1 Bound Address Register = 20000000?
0532 PCI Slave Image 1 Translation Offset = 00000000?
0533 PCI Slave Image 2 Control = 00000000? <-----
0534 PCI Slave Image 2 Base Address Register = 20000000?
0535 PCI Slave Image 2 Bound Address Register = 22000000?
0536 PCI Slave Image 2 Translation Offset = D0000000?
0537 PCI Slave Image 3 Control = 00000000? <-----
0538 PCI Slave Image 3 Base Address Register = 2FFF0000?
0539 PCI Slave Image 3 Bound Address Register = 30000000?
0540 PCI Slave Image 3 Translation Offset = D0000000?
0541 ```
0542
0543
0544 MVME2400
0545 ========
0546 The generic motorla_powerpc BSP was adapted to work on a MVME2432 by
0547 Thomas Doerfler <Thomas.Doerfler@embedded-brains.de>.
0548
0549 The main steps needed were adaptions to the "Hawk" controller, which
0550 replaces the MVME2300 Raven and Falcon chips.
0551
0552 This board now runs with the same BSP configuration as the MCP750, so
0553 select the mcp750 BSP.
0554
0555 The following settings in the PPCBUG's ENV were also important (taken
0556 from the "README.MVME2300" file:)
0557
0558 ```
0559 VME3PCI Master Master Enable [Y/N] = Y?
0560 PCI Slave Image 0 Control = 00000000? <-----
0561 PCI Slave Image 0 Base Address Register = 00000000?
0562 PCI Slave Image 0 Bound Address Register = 00000000?
0563 PCI Slave Image 0 Translation Offset = 00000000?
0564 PCI Slave Image 1 Control = 00000000? <-----
0565 PCI Slave Image 1 Base Address Register = 01000000?
0566 PCI Slave Image 1 Bound Address Register = 20000000?
0567 PCI Slave Image 1 Translation Offset = 00000000?
0568 PCI Slave Image 2 Control = 00000000? <-----
0569 PCI Slave Image 2 Base Address Register = 20000000?
0570 PCI Slave Image 2 Bound Address Register = 22000000?
0571 PCI Slave Image 2 Translation Offset = D0000000?
0572 PCI Slave Image 3 Control = 00000000? <-----
0573 PCI Slave Image 3 Base Address Register = 2FFF0000?
0574 PCI Slave Image 3 Bound Address Register = 30000000?
0575 PCI Slave Image 3 Translation Offset = D0000000?
0576 ```
0577
0578
0579 Other Boards
0580 ============
0581 This BSP is designed to support multiple Motorola PowerPC boards. The
0582 following extract from some email from Eric Valette should provide
0583 the basic information required to use this BSP on other models.
0584
0585 ```
0586 Joel> + I am sure there are other Motorola boards which this BSP should
0587 Joel> support. If you know of other models that should work, list
0588 Joel> them off to me. I will make them aliases and note them as
0589 Joel> untested in the status.
0590 ```
0591
0592 Extract of motorola.c :
0593
0594 ```c
0595 static const mot_info_t mot_boards[] = {
0596 {0x300, 0x00, "MVME 2400"},
0597 {0x010, 0x00, "Genesis"},
0598 {0x020, 0x00, "Powerstack (Series E)"},
0599 {0x040, 0x00, "Blackhawk (Powerstack)"},
0600 {0x050, 0x00, "Omaha (PowerStack II Pro3000)"},
0601 {0x060, 0x00, "Utah (Powerstack II Pro4000)"},
0602 {0x0A0, 0x00, "Powerstack (Series EX)"},
0603 {0x1E0, 0xE0, "Mesquite cPCI (MCP750)"},
0604 {0x1E0, 0xE1, "Sitka cPCI (MCPN750)"},
0605 {0x1E0, 0xE2, "Mesquite cPCI (MCP750) w/ HAC"},
0606 {0x1E0, 0xF6, "MTX Plus"},
0607 {0x1E0, 0xF7, "MTX wo/ Parallel Port"},
0608 {0x1E0, 0xF8, "MTX w/ Parallel Port"},
0609 {0x1E0, 0xF9, "MVME 2300"},
0610 {0x1E0, 0xFA, "MVME 2300SC/2600"},
0611 {0x1E0, 0xFB, "MVME 2600 with MVME712M"},
0612 {0x1E0, 0xFC, "MVME 2600/2700 with MVME761"},
0613 {0x1E0, 0xFD, "MVME 3600 with MVME712M"},
0614 {0x1E0, 0xFE, "MVME 3600 with MVME761"},
0615 {0x1E0, 0xFF, "MVME 1600-001 or 1600-011"},
0616 {0x000, 0x00, ""}
0617 };
0618 ```
0619
0620 In theory, each board starting with 0x1E0 should be really straighforward
0621 to port (604 proc or above and raven host bridge...).
0622
0623 Joel> Then we just have to add README.BOARD_MODEL and TIMES.BOARD_MODEL
0624
0625 I should also make a README to explain that some file containing
0626 switch statement should be completed (e.g libbsp/powerpc/shared/irq_init.c
0627 [NOTE: This is that README. :) ]
0628
0629 ```c
0630 if ( (currentBoard == MESQUITE) ) {
0631 VIA_isa_bridge_interrupts_setup();
0632 known_cpi_isa_bridge = 1;
0633 }
0634 if (!known_cpi_isa_bridge) {
0635 printk("Please add code for PCI/ISA bridge init to libbsp/shared/irq/irq_init.c\n");
0636 printk("If your card works correctly please add a test and set known_cpi_isa_bridge to true\n");
0637 }
0638 ```
0639
0640 and libbsp/powerpc/mpc6xx/execeptions/raw_exception.c
0641
0642 ```c
0643 int mpc604_vector_is_valid(rtems_vector vector)
0644 {
0645 /*
0646 * Please fill this for MVME2307
0647 */
0648 printk("Please complete libcpu/powerpc/XXX/raw_exception.c\n");
0649 return 0;
0650 }
0651
0652 int mpc60x_set_exception (const rtems_raw_except_connect_data* except)
0653 {
0654 unsigned int level;
0655
0656 if (current_ppc_cpu == PPC_750) {
0657 if (!mpc750_vector_is_valid(except->exceptIndex)){
0658 return 0;
0659 }
0660 goto exception_ok;
0661 }
0662 if (current_ppc_cpu == PPC_604) {
0663 if (!mpc604_vector_is_valid(except->exceptIndex)){
0664 return 0;
0665 }
0666 goto exception_ok;
0667 }
0668 printk("Please complete libcpu/powerpc/XXX/raw_exception.c\n");
0669 return 0;
0670 ```
0671
0672 NB : re readding the code I should have done a switch... TSSSS.A future patche
0673 I think.
