include/bsp/irq_supp.h

0001 /*
0002  *  The license and distribution terms for this file may be
0003  *  found in the file LICENSE in this distribution or at
0004  *  http://www.rtems.org/license/LICENSE.
0005  */
0006
0007 #ifndef IRQ_SHARED_IRQ_C_GLUE_H
0008 #define IRQ_SHARED_IRQ_C_GLUE_H
0009 /*
0010  *  This header describes the routines that are needed by the shared
0011  *  version of 'irq.c' (implementing the RTEMS irq API). They
0012  *  must be provided by the BSP.
0013  *
0014  *  The license and distribution terms for this file may be
0015  *  found in the file LICENSE in this distribution or at
0016  *  http://www.rtems.org/license/LICENSE.
0017  *
0018  */
0019
0020 #ifndef BSP_SHARED_HANDLER_SUPPORT
0021 #define BSP_SHARED_HANDLER_SUPPORT      1
0022 #endif
0023
0024 #include <rtems.h>
0025 #include <rtems/irq.h>
0026
0027 #include <bsp/vectors.h>
0028
0029 #ifdef __cplusplus
0030 extern "C" {
0031 #endif
0032
0033 /*
0034  * PIC-independent functions to enable/disable interrupt lines at
0035  * the pic.
0036  *
0037  * NOTE: the routines must ignore requests for enabling/disabling
0038  *       interrupts that are outside of the range handled by the
0039  *       PIC(s).
0040  */
0041 extern void BSP_enable_irq_at_pic(const rtems_irq_number irqLine);
0042 /*
0043  * RETURNS: nonzero (> 0 ) if irq was enabled originally, zero if irq
0044  *          was off and negative value if there was an error.
0045  */
0046 extern int  BSP_disable_irq_at_pic(const rtems_irq_number irqLine);
0047
0048 /*
0049  * Initialize the PIC.
0050  */
0051 extern int  BSP_setup_the_pic(rtems_irq_global_settings* config);
0052
0053 /*
0054  * Set up for the irq-generic.h interface.
0055  */
0056 int BSP_rtems_irq_generic_set(rtems_irq_global_settings* config);
0057
0058 /* IRQ dispatcher to be defined by the PIC driver; note that it MUST
0059  * implement shared interrupts.
0060  * Note also that the exception frame passed to this handler is not very
0061  * meaningful. Only the volatile registers and vector info are stored.
0062  *
0063  *******************************************************************
0064  * The routine must return zero if the interrupt was handled. If a
0065  * nonzero value is returned the dispatcher may panic and flag an
0066  * uncaught exception.
0067  *******************************************************************
0068  */
0069 int C_dispatch_irq_handler (BSP_Exception_frame *frame, unsigned int excNum);
0070
0071 /*
0072  * Snippet to be used by PIC drivers and by bsp_irq_dispatch_list
0073  * traverses list of shared handlers for a given interrupt
0074  *
0075  */
0076
0077 static inline void
0078 bsp_irq_dispatch_list_base(
0079   rtems_irq_connect_data *tbl,
0080   unsigned irq,
0081   rtems_irq_hdl sentinel
0082 )
0083 {
0084     rtems_irq_connect_data* vchain;
0085     for( vchain = &tbl[irq];
0086             ((intptr_t)vchain != -1 && vchain->hdl != sentinel);
0087             vchain = (rtems_irq_connect_data*)vchain->next_handler )
0088     {
0089           vchain->hdl(vchain->handle);
0090     }
0091 }
0092
0093
0094 /*
0095  * Snippet to be used by PIC drivers;
0096  * enables interrupts, traverses list of
0097  * shared handlers for a given interrupt
0098  * and restores original irq level
0099  *
0100  * Note that _ISR_Get_level() & friends are preferable to
0101  * manipulating MSR directly.
0102  */
0103
0104 static inline void
0105 bsp_irq_dispatch_list(
0106   rtems_irq_connect_data *tbl,
0107   unsigned irq,
0108   rtems_irq_hdl sentinel
0109 )
0110 {
0111     register uint32_t l_orig;
0112
0113     l_orig = _ISR_Get_level();
0114
0115     /* Enable all interrupts */
0116     _ISR_Set_level(0);
0117
0118
0119         bsp_irq_dispatch_list_base( tbl, irq, sentinel );
0120
0121     /* Restore original level */
0122     _ISR_Set_level(l_orig);
0123 }
0124
0125 #ifdef __cplusplus
0126 }
0127 #endif
0128
0129 #endif