gen5200/slicetimer/slicetimer.c

0001 /*
0002  * RTEMS generic MPC5200 BSP
0003  *
0004  * This file contains functions to implement a slice timer.
0005  *
0006  * References: Clock driver for PPC403
0007  */
0008
0009 /*
0010  * Author: Jay Monkman (jmonkman@frasca.com)
0011  * Copyright (C) 1998 by Frasca International, Inc.
0012  *
0013  * Derived from c/src/lib/libcpu/ppc/ppc403/clock/clock.c:
0014  * Author: Andrew Bray <andy@i-cubed.co.uk>
0015  *
0016  * Copyright (c) 1995 by i-cubed ltd.
0017  *
0018  * To anyone who acknowledges that this file is provided "AS IS"
0019  * without any express or implied warranty:
0020  *    permission to use, copy, modify, and distribute this file
0021  *    for any purpose is hereby granted without fee, provided that
0022  *    the above copyright notice and this notice appears in all
0023  *    copies, and that the name of i-cubed limited not be used in
0024  *    advertising or publicity pertaining to distribution of the
0025  *    software without specific, written prior permission.
0026  *    i-cubed limited makes no representations about the suitability
0027  *    of this software for any purpose.
0028  *
0029  * Modifications for deriving timer clock from cpu system clock by
0030  * Copyright (c) 1997 IMD Ingenieurbuero fuer Microcomputertechnik
0031  *
0032  * COPYRIGHT (c) 1989-1999.
0033  * On-Line Applications Research Corporation (OAR).
0034  *
0035  * Copyright (c) 2003 IPR Engineering
0036  *
0037  * Copyright (c) 2005 embedded brains GmbH & Co. KG
0038  *
0039  * The license and distribution terms for this file may be
0040  * found in the file LICENSE in this distribution or at
0041  * http://www.rtems.org/license/LICENSE.
0042  *
0043  * Modifications for PPC405GP by Dennis Ehlin
0044  */
0045
0046 #include <bsp.h>
0047 #include <rtems/bspIo.h>
0048 #include <bsp/fatal.h>
0049 #include <bsp/irq.h>
0050
0051 #include <rtems.h>
0052 #include <rtems/clockdrv.h>
0053 #include <rtems/libio.h>
0054
0055 #include <bsp/irq.h>
0056 #include <bsp/mpc5200.h>
0057 #include <bsp/slicetimer.h>
0058 #include <stdio.h>
0059
0060 uint32_t value0 = 0;
0061 uint32_t value1 = 0;
0062
0063 /*
0064  *  ISR Handlers
0065  */
0066 void mpc5200_slt_isr(uint32_t slt_no)
0067   {
0068   uint32_t status;
0069   struct mpc5200_slt *slt = (struct mpc5200_slt *)(&mpc5200.slt[slt_no]);
0070
0071   status = slt->tsr;
0072
0073   if(status & SLT_TSR_ST)
0074     {
0075
0076     slt->tsr |= SLT_TSR_ST;
0077
0078     /*if(slt_no == SLT0)
0079         slt0_user_defined_handler */
0080
0081     /*if(slt_no == SLT1)
0082         slt1_user_defined_handler */
0083
0084     }
0085
0086   }
0087
0088
0089 rtems_isr mpc5200_slt0_isr(rtems_irq_hdl_param unused)
0090   {
0091
0092   mpc5200_slt_isr(SLT0);
0093
0094   }
0095
0096
0097 rtems_isr mpc5200_slt1_isr(rtems_irq_hdl_param unused)
0098   {
0099
0100   mpc5200_slt_isr(SLT1);
0101
0102   }
0103
0104
0105 /*
0106  *  Initialize MPC5x00 slt
0107  */
0108 void mpc5200_init_slt(uint32_t slt_no)
0109   {
0110   struct mpc5200_slt *slt = (struct mpc5200_slt *)(&mpc5200.slt[slt_no]);
0111
0112   slt->tsr    = SLT_TSR_ST;
0113   slt->cntrl  = SLT_CNTRL_RW;
0114
0115   }
0116
0117
0118 /*
0119  *  Set MPC5x00 slt counter
0120  */
0121 void mpc5200_set_slt_count(uint32_t slt_no)
0122   {
0123   struct mpc5200_slt *slt = (struct mpc5200_slt *)(&mpc5200.slt[slt_no]);
0124
0125   if(slt_no == SLT0)
0126     /* Calculate counter value 24 bit (must be greater than 255) => IPB_Clock=33MHz -> Int. every 7,75us - 508ms */
0127     if((SLT_TSR_COUNT(SLT0_INT_FREQUENCY) > 0xFF) && (SLT_TSR_COUNT(SLT0_INT_FREQUENCY) < 0x1000000))
0128       slt->tcr = SLT_TSR_COUNT(SLT0_INT_FREQUENCY);
0129
0130   if(slt_no == SLT1)
0131     /* Calculate counter value 24 bit (must be greater than 255) => IPB_Clock=33MHz -> Int. every 7,75us - 508ms */
0132     if((SLT_TSR_COUNT(SLT1_INT_FREQUENCY) > 0xFF) && (SLT_TSR_COUNT(SLT1_INT_FREQUENCY) < 0x1000000))
0133       slt->tcr = SLT_TSR_COUNT(SLT1_INT_FREQUENCY);
0134
0135   }
0136
0137
0138 /*
0139  *  Enable MPC5x00 slt interrupt
0140  */
0141 void mpc5200_enable_slt_int(uint32_t slt_no)
0142   {
0143   struct mpc5200_slt *slt = (struct mpc5200_slt *)(&mpc5200.slt[slt_no]);
0144
0145   slt->cntrl  |= SLT_CNTRL_TIMEN | SLT_CNTRL_INTEN;
0146
0147   }
0148
0149
0150 /*
0151  *  Disable MPC5x00 slt interrupt
0152  */
0153 void mpc5200_disable_slt_int(uint32_t slt_no)
0154   {
0155   struct mpc5200_slt *slt = (struct mpc5200_slt *)(&mpc5200.slt[slt_no]);
0156
0157   slt->cntrl &= ~(SLT_CNTRL_TIMEN | SLT_CNTRL_INTEN);
0158
0159   }
0160
0161
0162 /*
0163  *  Check MPC5x00 slt status
0164  */
0165 uint32_t mpc5200_check_slt_status(uint32_t slt_no)
0166   {
0167   struct mpc5200_slt *slt = (struct mpc5200_slt *)(&mpc5200.slt[slt_no]);
0168
0169   if(((slt->cntrl) & (SLT_CNTRL_TIMEN | SLT_CNTRL_INTEN)) == (SLT_CNTRL_TIMEN | SLT_CNTRL_INTEN))
0170     return 1;
0171   else
0172     return 0;
0173
0174   }
0175
0176 /*
0177  *  switch MPC5x00 slt on
0178  */
0179 static void sltOn(const rtems_irq_connect_data* irq)
0180   {
0181   uint32_t slt_no = 0;
0182
0183   if((irq->name) == BSP_SIU_IRQ_SL_TIMER0)
0184     slt_no = 0;
0185
0186   if((irq->name) == BSP_SIU_IRQ_SL_TIMER1)
0187     slt_no = 1;
0188
0189   mpc5200_set_slt_count((uint32_t)slt_no);
0190   mpc5200_enable_slt_int((uint32_t)slt_no);
0191
0192   }
0193
0194 /*
0195  *  switch MPC5x00 slt off
0196  */
0197 static void sltOff(const rtems_irq_connect_data* irq)
0198   {
0199   uint32_t slt_no = 0;
0200
0201   if((irq->name) == BSP_SIU_IRQ_SL_TIMER0)
0202     slt_no = 0;
0203
0204   if((irq->name) == BSP_SIU_IRQ_SL_TIMER1)
0205     slt_no = 1;
0206
0207   mpc5200_disable_slt_int((uint32_t)slt_no);
0208
0209   }
0210
0211 /*
0212  *  get status of MPC5x00 slt
0213  */
0214 static int sltIsOn(const rtems_irq_connect_data* irq)
0215   {
0216   uint32_t slt_no = 0;
0217
0218   if((irq->name) == BSP_SIU_IRQ_SL_TIMER0)
0219     slt_no = 0;
0220
0221   if((irq->name) == BSP_SIU_IRQ_SL_TIMER1)
0222     slt_no = 1;
0223
0224   if(mpc5200_check_slt_status(slt_no))
0225     return 1;
0226   else
0227     return 0;
0228   }
0229
0230 /*
0231  *  MPC5x00 slt0 irq connect data
0232  */
0233 static rtems_irq_connect_data slt0_IrqData =
0234   {
0235   BSP_SIU_IRQ_SL_TIMER0,
0236   mpc5200_slt0_isr,
0237   (rtems_irq_hdl_param) NULL,
0238   (rtems_irq_enable)sltOn,
0239   (rtems_irq_disable)sltOff,
0240   (rtems_irq_is_enabled)sltIsOn
0241   };
0242
0243 /*
0244  *  MPC5x00 slt1 irq connect data
0245  */
0246 static rtems_irq_connect_data slt1_IrqData =
0247   {
0248   BSP_SIU_IRQ_SL_TIMER1,
0249   mpc5200_slt1_isr,
0250   (rtems_irq_hdl_param) NULL,
0251   (rtems_irq_enable)sltOn,
0252   (rtems_irq_disable)sltOff,
0253   (rtems_irq_is_enabled)sltIsOn
0254   };
0255
0256 /*
0257  *  call MPC5x00 slt install routines
0258  */
0259 void Install_slt(rtems_device_minor_number slt_no)
0260   {
0261
0262   mpc5200_init_slt((uint32_t)slt_no);
0263   mpc5200_set_slt_count((uint32_t)slt_no);
0264
0265   }
0266
0267 /*
0268  *  MPC5x00 slt device driver initialize
0269  */
0270 rtems_device_driver slt_initialize
0271   (
0272   rtems_device_major_number major,
0273   rtems_device_minor_number minor,
0274   void *pargp
0275   )
0276   {
0277
0278   /* force minor according to definitions in bsp.h */
0279   if(USE_SLICETIMER_0)
0280     {
0281
0282     Install_slt(0);
0283
0284     if(!BSP_install_rtems_irq_handler(&slt0_IrqData))
0285       {
0286
0287       printk("Unable to connect PSC Irq handler\n");
0288       bsp_fatal(MPC5200_FATAL_SLICETIMER_0_IRQ_INSTALL);
0289
0290       }
0291
0292     }
0293
0294   if(USE_SLICETIMER_1)
0295     {
0296
0297     Install_slt(1);
0298
0299     if(!BSP_install_rtems_irq_handler(&slt1_IrqData))
0300       {
0301
0302       printk("Unable to connect PSC Irq handler\n");
0303       bsp_fatal(MPC5200_FATAL_SLICETIMER_1_IRQ_INSTALL);
0304
0305       }
0306
0307     }
0308
0309   return RTEMS_SUCCESSFUL;
0310
0311   }
0312