gen5200/mscan/mscan_int.h

0001 /* SPDX-License-Identifier: BSD-2-Clause */
0002
0003 /*
0004  * RTEMS generic MPC5200 BSP
0005  *
0006  * This file has to be included by the m driver.
0007  */
0008
0009 /*
0010  * Copyright (c) 2005 embedded brains GmbH & Co. KG
0011  *
0012  * Redistribution and use in source and binary forms, with or without
0013  * modification, are permitted provided that the following conditions
0014  * are met:
0015  * 1. Redistributions of source code must retain the above copyright
0016  *    notice, this list of conditions and the following disclaimer.
0017  * 2. Redistributions in binary form must reproduce the above copyright
0018  *    notice, this list of conditions and the following disclaimer in the
0019  *    documentation and/or other materials provided with the distribution.
0020  *
0021  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
0022  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
0023  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
0024  * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
0025  * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
0026  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
0027  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
0028  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
0029  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
0030  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
0031  * POSSIBILITY OF SUCH DAMAGE.
0032  */
0033
0034 #ifndef __MSCAN_INT_H__
0035 #define __MSCAN_INT_H__
0036
0037 #ifdef __cplusplus
0038 extern "C" {
0039 #endif
0040
0041 #include <bsp/mscan-base.h>
0042
0043 #include <bsp/mscan.h>
0044
0045 #define MSCAN_RX_BUFF_NUM        4
0046 #define MSCAN_TX_BUFF_NUM        3
0047
0048 #define MSCAN_NON_INITIALIZED_MODE   0
0049 #define MSCAN_INITIALIZED_MODE       1
0050 #define MSCAN_INIT_NORMAL_MODE       2
0051 #define MSCAN_NORMAL_MODE            4
0052 #define MSCAN_SLEEP_MODE             8
0053
0054 #define MSCAN_RX_BUFF_NOACTIVE   (0 << 4)
0055 #define MSCAN_RX_BUFF_EMPTY      (1 << 6)
0056 #define MSCAN_RX_BUFF_FULL       (1 << 5)
0057 #define MSCAN_RX_BUFF_OVERRUN    ((MSCAN_RX_BUFF_EMPTY) | (MSCAN_RX_BUFF_FULL))
0058 #define MSCAN_RX_BUFF_BUSY       (1 << 4)
0059
0060 #define MSCAN_MBUFF_MASK         0x07
0061
0062 #define MSCAN_TX_BUFF0           (1 << 0)
0063 #define MSCAN_TX_BUFF1           (1 << 1)
0064 #define MSCAN_TX_BUFF2           (1 << 2)
0065
0066 #define MSCAN_IDE                (1 << 0)
0067 #define MSCAN_RTR                (1 << 1)
0068 #define MSCAN_READ_RXBUFF_0      (1 << 2)
0069 #define MSCAN_READ_RXBUFF_1      (1 << 2)
0070 #define MSCAN_READ_RXBUFF_2      (1 << 2)
0071 #define MSCAN_READ_RXBUFF_3      (1 << 2)
0072
0073 #define MSCAN_STATE_OK           0
0074 #define MSCAN_STATE_ERR          1
0075 #define MSCAN_STATE_WRN          2
0076 #define MSCAN_STATE_BUSOFF       3
0077
0078 #define TX_MBUF_SEL(buf_no)      (1 << (buf_no))
0079 #define TX_DATA_LEN(len)         ((len) & 0x0F)
0080
0081 #define TX_MBUF_EMPTY(val)       (1 << (val))
0082
0083 #define ID_RTR                   (1 << 4)
0084
0085 #define SET_IDR0(u16)            ((uint8_t)((u16) >> 3))
0086 #define SET_IDR1(u16)            (MSCAN_MESS_ID_HAS_RTR(u16) ? ((uint8_t)(((u16) & 0x0007) << 5))|((uint8_t)(ID_RTR)) : ((uint8_t)(((u16) & 0x0007) << 5)))
0087
0088 #define SET_IDR2(u16)            SET_IDR0(u16)
0089 #define SET_IDR3(u16)            SET_IDR1(u16)
0090
0091 #define SET_IDR4(u16)            SET_IDR0(u16)
0092 #define SET_IDR5(u16)            SET_IDR1(u16)
0093
0094 #define SET_IDR6(u16)            SET_IDR0(u16)
0095 #define SET_IDR7(u16)            SET_IDR1(u16)
0096
0097 #define GET_IDR0(u16)            ((uint16_t) ((u16) << 3))
0098 #define GET_IDR1(u16)            ((((u16)&(ID_RTR))==(ID_RTR)) ? (uint16_t) ((((u16) >> 5)&0x0007)|MSCAN_MESS_ID_RTR) : (uint16_t)(((u16) >> 5)&0x0007))
0099
0100 #define GET_IDR2(u16)            GET_IDR0(u16)
0101 #define GET_IDR3(u16)            GET_IDR1(u16)
0102
0103 #define GET_IDR4(u16)            GET_IDR0(u16)
0104 #define GET_IDR5(u16)            GET_IDR1(u16)
0105
0106 #define GET_IDR6(u16)            GET_IDR0(u16)
0107 #define GET_IDR7(u16)            GET_IDR1(u16)
0108
0109 #define SET_IDMR0(u16)           ((uint8_t)((u16) >> 3))
0110 #define SET_IDMR1(u16)           (MSCAN_MESS_ID_HAS_RTR(u16) ? ((uint8_t) (((((u16) & 0x0007) << 5)|((uint8_t)(ID_RTR)))|0x0007)) : ((uint8_t)((((u16) & 0x0007) << 5))|0x0007))
0111
0112 #define SET_IDMR2(u16)           SET_IDMR0(u16)
0113 #define SET_IDMR3(u16)           SET_IDMR1(u16)
0114
0115 #define SET_IDMR4(u16)           SET_IDMR0(u16)
0116 #define SET_IDMR5(u16)           SET_IDMR1(u16)
0117
0118 #define SET_IDMR6(u16)           SET_IDMR0(u16)
0119 #define SET_IDMR7(u16)           SET_IDMR1(u16)
0120
0121 #define GET_IDMR0(u16)           ((uint16_t)((u16) << 3))
0122 #define GET_IDMR1(u16)           ((((u16)&(ID_RTR))==(ID_RTR)) ? (uint16_t) ((((u16) >> 5)&0x0007)|MSCAN_MESS_ID_RTR) : (uint16_t)(((u16) >> 5)&0x0007))
0123
0124 #define GET_IDMR2(u16)           GET_IDMR0(u16)
0125 #define GET_IDMR3(u16)           GET_IDMR1(u16)
0126
0127 #define GET_IDMR4(u16)           GET_IDMR0(u16)
0128 #define GET_IDMR5(u16)           GET_IDMR1(u16)
0129
0130 #define GET_IDMR6(u16)           GET_IDMR0(u16)
0131 #define GET_IDMR7(u16)           GET_IDMR1(u16)
0132
0133 #define NO_OF_MSCAN_RX_BUFF      20
0134 #define MSCAN_MESSAGE_SIZE(size) (((size)%CPU_ALIGNMENT) ? (((size) + CPU_ALIGNMENT)-((size) + CPU_ALIGNMENT)%CPU_ALIGNMENT) : (size))
0135
0136 #define TX_BUFFER_0              0
0137 #define TX_BUFFER_1              1
0138 #define TX_BUFFER_2              2
0139
0140 #define RX_BUFFER_0              0
0141 #define RX_BUFFER_1              1
0142 #define RX_BUFFER_2              2
0143 #define RX_BUFFER_3              3
0144
0145 #define NO_OF_MSCAN_TX_BUFF      20
0146 #define RING_BUFFER_EMPTY(rbuff) ((((rbuff)->head) == ((rbuff)->tail)) ? TRUE : FALSE)
0147 #define RING_BUFFER_FULL(rbuff)  ((((rbuff)->head) == ((rbuff)->tail)) ? TRUE : FALSE)
0148
0149
0150 typedef struct _mscan_handle
0151   {
0152   uint8_t mscan_channel;
0153   void (*toucan_callback)(int16_t);
0154   } mscan_handle;
0155
0156 struct ring_buf
0157     {
0158     struct can_message * volatile buf_ptr;
0159     struct can_message * volatile head_ptr;
0160     struct can_message * volatile tail_ptr;
0161     };
0162
0163 struct mpc5200_rx_cntrl
0164   {
0165   struct can_message can_rx_message[MSCAN_RX_BUFF_NUM];
0166   };
0167
0168 struct mscan_channel_info
0169   {
0170   mscan *regs;
0171   uint32_t   int_rx_err;
0172   rtems_id   rx_qid;
0173   uint32_t   rx_qname;
0174   rtems_id   tx_rb_sid;
0175   uint32_t   tx_rb_sname;
0176   uint8_t    id_extended;
0177   uint8_t    mode;
0178   uint8_t    tx_buf_no;
0179   struct ring_buf tx_ring_buf;
0180   };
0181
0182 extern void CanInterrupt_A(int16_t);
0183 extern void CanInterrupt_B(int16_t);
0184
0185 /*MSCAN driver internal functions */
0186 void mscan_hardware_initialize(rtems_device_major_number, uint32_t, void *);
0187 void mpc5200_mscan_wait_sync(mscan *);
0188 void mpc5200_mscan_perform_init_mode_settings(mscan *);
0189 void mpc5200_mscan_perform_normal_mode_settings(mscan *);
0190 rtems_status_code mpc5200_mscan_set_mode(rtems_device_minor_number, uint8_t);
0191 rtems_status_code mscan_channel_initialize(rtems_device_major_number, rtems_device_minor_number);
0192
0193 #ifdef __cplusplus
0194 }
0195 #endif
0196
0197 #endif /* __MSCAN_H__ */