bestcomm/task_api/bestcomm_cntrl.h

0001 #ifndef __TASK_API_BESTCOMM_CNTRL_H
0002 #define __TASK_API_BESTCOMM_CNTRL_H 1
0003
0004 /******************************************************************************
0005 *
0006 * Copyright (c) 2004 Freescale Semiconductor, Inc.
0007 *
0008 * Permission is hereby granted, free of charge, to any person obtaining a
0009 * copy of this software and associated documentation files (the "Software"),
0010 * to deal in the Software without restriction, including without limitation
0011 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
0012 * and/or sell copies of the Software, and to permit persons to whom the
0013 * Software is furnished to do so, subject to the following conditions:
0014 *
0015 * The above copyright notice and this permission notice shall be included
0016 * in all copies or substantial portions of the Software.
0017 *
0018 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
0019 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
0020 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
0021 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
0022 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
0023 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
0024 * OTHER DEALINGS IN THE SOFTWARE.
0025 *
0026 ******************************************************************************/
0027
0028 /*******************************************************************************
0029  * Defines to control SmartDMA and its tasks. These defines are used for the
0030  * task build process to minimize disconnects at the task/driver interface.
0031  ******************************************************************************/
0032
0033 #define SDMA_INT_BIT_DBG             31          /* debug interrupt bit        */
0034 #define SDMA_INT_BIT_TEA             28          /* TEA interrupt bit          */
0035 #define SDMA_INT_BIT_TEA_TASK        24          /* lsb for TEA task number    */
0036 #define SDMA_INT_BIT_IMPL            0x9000FFFF
0037
0038 #define SDMA_PTDCTRL_BIT_TEA         14          /* TEA detection enable bit   */
0039
0040 #define SDMA_TCR_BIT_AUTO            15          /* auto start bit             */
0041 #define SDMA_TCR_BIT_HOLD             5          /* hold initiator bit         */
0042
0043 #define SDMA_STAT_BIT_ALARM          17
0044 #define SDMA_FIFO_ALARM_MASK         0x0020000
0045
0046 #define SDMA_DRD_BIT_TFD             27   /* mark last buffer of frame         */
0047 #define SDMA_DRD_BIT_INT             26   /* interrupt after buffer processed  */
0048 #define SDMA_DRD_BIT_INIT            21   /* lsb position of initiator         */
0049 #define SDMA_DRD_MASK_FLAGS          0x0C000000  /* BD_FLAGS flag bits            */
0050 #define SDMA_DRD_MASK_LENGTH         0x03FFFFFF  /* BD_FLAGS length mask          */
0051 #define SDMA_BD_BIT_READY            30          /* Status BD ready bit           */
0052 #ifdef SAS_COMPILE
0053  #define SDMA_BD_MASK_READY          constant(1<<SDMA_BD_BIT_READY)
0054 #else
0055  #define SDMA_BD_MASK_READY          (1<<SDMA_BD_BIT_READY)
0056 #endif
0057 #define SDMA_BD_MASK_SIGN            0x7FFFFFFF  /* task code needs Status>0      */
0058
0059 #define SDMA_PRAGMA_BIT_RSV          7  /* reserved pragma bit                    */
0060 #define SDMA_PRAGMA_BIT_PRECISE_INC  6  /* increment 0=when possible, 1=iter end  */
0061 #define SDMA_PRAGMA_BIT_RST_ERROR_NO 5  /* don't reset errors on task enable      */
0062 #define SDMA_PRAGMA_BIT_PACK         4  /* pack data enable                       */
0063 #define SDMA_PRAGMA_BIT_INTEGER      3  /* data alignment 0=frac(msb), 1=int(lsb) */
0064 #define SDMA_PRAGMA_BIT_SPECREAD     2  /* XLB speculative read enable            */
0065 #define SDMA_PRAGMA_BIT_CW           1  /* write line buffer enable               */
0066 #define SDMA_PRAGMA_BIT_RL           0  /* read line buffer enable                */
0067
0068 #define SDMA_TASK_ENTRY_BYTES       32  /* Bytes per task in entry table  */
0069 #define SDMA_TASK_GROUP_NUM         16  /* Number of tasks per task group */
0070 #define SDMA_TASK_GROUP_BYTES       (SDMA_TASK_ENTRY_BYTES*SDMA_TASK_GROUP_NUM)
0071
0072
0073 /*******************************************************************************
0074  * Task group control macros, use when TaskNum > 15
0075  ******************************************************************************/
0076 #define SDMA_TASKNUM_EXT(OldTaskNum) (OldTaskNum%16)
0077
0078 #define SDMA_TASKBAR_CHANGE(sdma, OldTaskNum) { \
0079     sdma->taskBar += (((int)(OldTaskNum/SDMA_TASK_GROUP_NUM))*SDMA_TASK_GROUP_BYTES); \
0080 }
0081
0082 #define SDMA_TASKBAR_RESTORE(sdma, OldTaskNum) {    \
0083     sdma->taskBar -= (((int)(OldTaskNum/SDMA_TASK_GROUP_NUM))*SDMA_TASK_GROUP_BYTES); \
0084 }
0085
0086
0087 /*******************************************************************************
0088  * Task control macros
0089  ******************************************************************************/
0090 #define SDMA_TASK_CFG(RegAddr, TaskNum, AutoStart, AutoStartNum) { \
0091     *(((volatile uint16 *)RegAddr)+TaskNum) = (uint16)(0x0000     |  \
0092                                      ((AutoStart!=0)<<7) |  \
0093                                      (AutoStartNum&0xF)  ); \
0094 }
0095
0096 #define SDMA_TASK_AUTO_START(RegAddr, TaskNum, AutoStart, AutoStartNum) { \
0097     *(((volatile uint16 *)RegAddr)+TaskNum) = (uint16)((*(((volatile uint16 *)RegAddr)+TaskNum) & \
0098                                      (uint16) 0xff30) | ((uint16)(0x0000 |  \
0099                                      ((AutoStart!=0)<<7) |  \
0100                                      (AutoStartNum&0xF))  )); \
0101 }
0102
0103 #define SDMA_TASK_ENABLE(RegAddr, TaskNum) {    \
0104     *(((volatile uint16 *)RegAddr)+TaskNum) |=  (uint16)0x8000; \
0105 }
0106
0107 #define SDMA_TASK_DISABLE(RegAddr, TaskNum) {   \
0108     *(((volatile uint16 *)RegAddr)+TaskNum) &= ~(uint16)0x8000; \
0109 }
0110
0111 #define SDMA_TASK_STATUS(RegAddr, TaskNum)  \
0112     *(((volatile uint16 *)RegAddr)+TaskNum)
0113
0114
0115 /*******************************************************************************
0116  * Interrupt control macros
0117  ******************************************************************************/
0118 #define SDMA_INT_ENABLE(RegAddr, Bit) \
0119   do { \
0120     rtems_interrupt_level level; \
0121     rtems_interrupt_disable(level); \
0122     *((volatile uint32 *) RegAddr) &= ~((uint32) (1 << Bit)); \
0123     rtems_interrupt_enable(level); \
0124   } while (0)
0125
0126 #define SDMA_INT_DISABLE(RegAddr, Bit) \
0127   do { \
0128     rtems_interrupt_level level; \
0129     rtems_interrupt_disable(level); \
0130     *((volatile uint32 *) (RegAddr)) |= ((uint32)(1 << Bit)); \
0131     rtems_interrupt_enable(level); \
0132   } while (0)
0133
0134 #define SDMA_INT_SOURCE(RegPend, RegMask)   \
0135     (*((volatile uint32 *)(RegPend)) & (~*((volatile uint32 *)(RegMask))) & (uint32)SDMA_INT_BIT_IMPL)
0136
0137 #define SDMA_INT_PENDING(RegPend, RegMask)  \
0138     (*((volatile uint32 *)(RegPend)) & (~*((volatile uint32 *)(RegMask))))
0139
0140 #define SDMA_INT_TEST(IntSource, Bit)   \
0141     (((uint32)IntSource) & ((uint32)(1<<Bit)))
0142
0143 /*
0144  * define SDMA_INT_FIND to get int bit rather than scan all bits use
0145  * cntlzw
0146  */
0147
0148 /* Clear the IntPend bit */
0149 #define SDMA_CLEAR_IEVENT(RegAddr, Bit) {   \
0150     *((volatile uint32 *)RegAddr) = ((uint32)(1<<Bit)); \
0151 }
0152
0153 #define SDMA_GET_PENDINGBIT(sdma, Bit)  \
0154     (sdma->IntPend & (uint32)(1<<Bit))
0155
0156 #define SDMA_GET_MASKBIT(sdma, Bit) \
0157     (sdma->IntMask & (uint32)(1<<Bit))
0158
0159
0160 /*******************************************************************************
0161  * SmartDMA FIFO control macros
0162  ******************************************************************************/
0163
0164 /*******************************************************************************
0165  * SmartDMA TEA detection control macros
0166  ******************************************************************************/
0167 /* Enable SmartDMA TEA detection and TEA interrupt */
0168 #define SDMA_TEA_ENABLE(sdma) {                             \
0169     SDMA_INT_ENABLE(sdma, SDMA_INT_BIT_TEA);                \
0170     sdma->PtdCntrl &= ~((uint32)(1<<SDMA_PTDCTRL_BIT_TEA)); \
0171 }
0172
0173 /* Disable SmartDMA TEA detection and TEA interrupt */
0174 #define SDMA_TEA_DISABLE(sdma) {                            \
0175     SDMA_INT_DISABLE(sdma, SDMA_INT_BIT_TEA);               \
0176     sdma->PtdCntrl |=  ((uint32)(1<<SDMA_PTDCTRL_BIT_TEA)); \
0177 }
0178
0179 /* Clear the TEA interrupt */
0180 #define SDMA_TEA_CLEAR(sdma) {                                  \
0181     sdma->IntPend =  ((uint32)(0x1F<<SDMA_INT_BIT_TEA_TASK));   \
0182 }
0183
0184 /* Determine which task caused a TEA on the XLB */
0185 #define SDMA_TEA_SOURCE(RegPend)    \
0186     (uint32)(((*(volatile uint32 *)RegPend)>>SDMA_INT_BIT_TEA_TASK) & 0xF)
0187
0188
0189 /*******************************************************************************
0190  * SmartDMA debug control macros
0191  ******************************************************************************/
0192 /* Enable the SmartDMA debug unit and DBG interrupt */
0193 /* add sdma->dbg_regs setup? */
0194 #define SDMA_DBG_ENABLE(sdma) {                 \
0195     SDMA_INT_ENABLE(sdma, SDMA_INT_BIT_DBG);    \
0196 }
0197
0198 #define SDMA_DBG_DISABLE(sdma) {                \
0199     SDMA_INT_DISABLE(sdma, SDMA_INT_BIT_DBG);   \
0200 }
0201
0202 /* Clear the debug interrupt */
0203 #define SDMA_DBG_CLEAR(sdma) {                  \
0204     SDMA_CLEAR_IEVENT(sdma, SDMA_INT_BIT_DBG);  \
0205 }
0206
0207 #define SDMA_DBG_MDE(dst, sdma, addr) { \
0208     sdma->MDEDebug = addr;              \
0209     dst = sdma->MDEDebug;               \
0210 }
0211
0212 #define SDMA_DBG_ADS(dst, sdma, addr) { \
0213     sdma->ADSDebug = addr;              \
0214     dst = sdma->ADSDebug;               \
0215 }
0216
0217 #define SDMA_DBG_PTD(dst, sdma, addr) { \
0218     sdma->PTDDebug = addr;              \
0219     dst = sdma->PTDDebug;               \
0220 }
0221
0222
0223 /*******************************************************************************
0224  * Initiator control macros
0225  ******************************************************************************/
0226
0227 /* This macro may not work, getting compile errors */
0228 /* Set the Transfer Size */
0229 /* Note that masking the size w/ 0x3 gives the desired value for uint32 */
0230 /*    (expressed as 4), namely 0. */
0231 #define SDMA_SET_SIZE(RegAddr, TaskNum, SrcSize, DstSize)           \
0232     *(((volatile uint8 *)RegAddr)+((uint32)(TaskNum/2))) =                  \
0233     (uint8)((*(((volatile uint8 *)RegAddr)+((uint32)(TaskNum/2))) &         \
0234             ((TaskNum%2) ? 0xf0 : 0x0f)) |                          \
0235     ((uint8)(((SrcSize & 0x3)<<2) |                                 \
0236             ( DstSize & 0x3 ) ) <<(4*((int)(1-(TaskNum%2))))));
0237
0238 /* This macro may not work */
0239 /* Set the Initiator in TCR */
0240 #define SDMA_SET_INIT(RegAddr, TaskNum, Initiator)                  \
0241 {                                                                   \
0242     *(((volatile uint16 *)RegAddr)+TaskNum) &= (uint16)0xE0FF;              \
0243     *(((volatile uint16 *)RegAddr)+TaskNum) |= (((0x01F & Initiator)<<8) |  \
0244                                       (0<<SDMA_TCR_BIT_HOLD));      \
0245 }
0246
0247 /* Change DRD initiator number */
0248 #define SDMA_INIT_CHANGE(task, oldInitiator, newInitiator) {        \
0249     int i;                                                          \
0250     for (i=0; i<task->NumDRD; i++) {                                \
0251         if (SDMA_INIT_READ(task->DRD[i]) == (uint32)oldInitiator) { \
0252             SDMA_INIT_WRITE(task->DRD[i],newInitiator);             \
0253         }                                                           \
0254     }                                                               \
0255 }
0256
0257 /* Set the Initiator Priority */
0258 #define SDMA_SET_INITIATOR_PRIORITY(sdma, initiator, priority)  \
0259     *(((volatile uint8 *)&sdma->IPR0)+initiator) = priority;
0260
0261
0262 /* Read DRD initiator number */
0263 #define SDMA_INIT_READ(PtrDRD)  \
0264     (((*(volatile uint32 *)PtrDRD)>>SDMA_DRD_BIT_INIT) & (uint32)0x1F)
0265
0266 /* Write DRD initiator number */
0267 #define SDMA_INIT_WRITE(PtrDRD, Initiator) {                    \
0268     *(volatile uint32 *)PtrDRD = ((*(volatile uint32 *)PtrDRD) & 0xFC1FFFFF) |  \
0269                         (Initiator<<SDMA_DRD_BIT_INIT);         \
0270 }
0271
0272 /* Change DRD initiator number */
0273 #define SDMA_INIT_CHANGE(task, oldInitiator, newInitiator) {        \
0274     int i;                                                          \
0275     for (i=0; i<task->NumDRD; i++) {                                \
0276         if (SDMA_INIT_READ(task->DRD[i]) == (uint32)oldInitiator) { \
0277             SDMA_INIT_WRITE(task->DRD[i],newInitiator);             \
0278         }                                                           \
0279     }                                                               \
0280 }
0281
0282 #endif  /* __TASK_API_BESTCOMM_CNTRL_H */