File indexing completed on 2025-05-11 08:23:52
0001 #ifndef __TASK_API_BESTCOMM_API_MEM_H
0002 #define __TASK_API_BESTCOMM_API_MEM_H 1
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0028 #include "../include/mgt5200/mgt5200.h"
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0034 extern uint8 *MBarGlobal;
0035
0036 #define SDMA_TASK_BAR (MBarGlobal+MBAR_SDMA+0x000)
0037 #define SDMA_INT_PEND (MBarGlobal+MBAR_SDMA+0x014)
0038 #define SDMA_INT_MASK (MBarGlobal+MBAR_SDMA+0x018)
0039 #define SDMA_TCR (MBarGlobal+MBAR_SDMA+0x01C)
0040 #define SDMA_TASK_SIZE (MBarGlobal+MBAR_SDMA+0x060)
0041
0042 #define PCI_TX_PKT_SIZE (MBarGlobal+MBAR_SCPCI+0x000)
0043 #define PCI_TX_NTBIT (MBarGlobal+MBAR_SCPCI+0x01C)
0044 #define PCI_TX_FIFO (MBarGlobal+MBAR_SCPCI+0x040)
0045 #define PCI_TX_FIFO_STAT (MBarGlobal+MBAR_SCPCI+0x045)
0046 #define PCI_TX_FIFO_GRAN (MBarGlobal+MBAR_SCPCI+0x048)
0047 #define PCI_TX_FIFO_ALARM (MBarGlobal+MBAR_SCPCI+0x04E)
0048
0049 #define PCI_RX_PKT_SIZE (MBarGlobal+MBAR_SCPCI+0x080)
0050 #define PCI_RX_NTBIT (MBarGlobal+MBAR_SCPCI+0x09C)
0051 #define PCI_RX_FIFO (MBarGlobal+MBAR_SCPCI+0x0C0)
0052 #define PCI_RX_FIFO_STAT (MBarGlobal+MBAR_SCPCI+0x0C5)
0053 #define PCI_RX_FIFO_GRAN (MBarGlobal+MBAR_SCPCI+0x0C8)
0054 #define PCI_RX_FIFO_ALARM (MBarGlobal+MBAR_SCPCI+0x0CE)
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0056
0057 #define FEC_RX_FIFO (MBarGlobal+MBAR_ETHERNET+0x184)
0058 #define FEC_RX_FIFO_STAT (MBarGlobal+MBAR_ETHERNET+0x188)
0059 #define FEC_RX_FIFO_GRAN (MBarGlobal+MBAR_ETHERNET+0x18C)
0060 #define FEC_RX_FIFO_ALARM (MBarGlobal+MBAR_ETHERNET+0x198)
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0062 #define FEC_TX_FIFO (MBarGlobal+MBAR_ETHERNET+0x1A4)
0063 #define FEC_TX_FIFO_STAT (MBarGlobal+MBAR_ETHERNET+0x1A8)
0064 #define FEC_TX_FIFO_GRAN (MBarGlobal+MBAR_ETHERNET+0x1AC)
0065 #define FEC_TX_FIFO_ALARM (MBarGlobal+MBAR_ETHERNET+0x1B8)
0066
0067 #endif