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File indexing completed on 2025-05-11 08:23:52

0001 #ifndef __TASK_API_BESTCOMM_API_MEM_H
0002 #define __TASK_API_BESTCOMM_API_MEM_H 1
0003 
0004 /******************************************************************************
0005 *
0006 * Copyright (c) 2004 Freescale Semiconductor, Inc.
0007 *
0008 * Permission is hereby granted, free of charge, to any person obtaining a
0009 * copy of this software and associated documentation files (the "Software"),
0010 * to deal in the Software without restriction, including without limitation
0011 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
0012 * and/or sell copies of the Software, and to permit persons to whom the
0013 * Software is furnished to do so, subject to the following conditions:
0014 *
0015 * The above copyright notice and this permission notice shall be included
0016 * in all copies or substantial portions of the Software.
0017 *
0018 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
0019 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
0020 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
0021 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
0022 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
0023 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
0024 * OTHER DEALINGS IN THE SOFTWARE.
0025 *
0026 ******************************************************************************/
0027 
0028 #include "../include/mgt5200/mgt5200.h"
0029 
0030 /*
0031  * An extern global variable is used here for the MBAR since it must
0032  * be passed into the API for processes that use virtual memory.
0033  */
0034 extern uint8 *MBarGlobal;
0035 
0036 #define SDMA_TASK_BAR      (MBarGlobal+MBAR_SDMA+0x000)
0037 #define SDMA_INT_PEND      (MBarGlobal+MBAR_SDMA+0x014)
0038 #define SDMA_INT_MASK      (MBarGlobal+MBAR_SDMA+0x018)
0039 #define SDMA_TCR           (MBarGlobal+MBAR_SDMA+0x01C)
0040 #define SDMA_TASK_SIZE     (MBarGlobal+MBAR_SDMA+0x060)
0041 
0042 #define PCI_TX_PKT_SIZE    (MBarGlobal+MBAR_SCPCI+0x000)
0043 #define PCI_TX_NTBIT       (MBarGlobal+MBAR_SCPCI+0x01C)
0044 #define PCI_TX_FIFO        (MBarGlobal+MBAR_SCPCI+0x040)
0045 #define PCI_TX_FIFO_STAT   (MBarGlobal+MBAR_SCPCI+0x045)
0046 #define PCI_TX_FIFO_GRAN   (MBarGlobal+MBAR_SCPCI+0x048)
0047 #define PCI_TX_FIFO_ALARM  (MBarGlobal+MBAR_SCPCI+0x04E)
0048 
0049 #define PCI_RX_PKT_SIZE    (MBarGlobal+MBAR_SCPCI+0x080)
0050 #define PCI_RX_NTBIT       (MBarGlobal+MBAR_SCPCI+0x09C)
0051 #define PCI_RX_FIFO        (MBarGlobal+MBAR_SCPCI+0x0C0)
0052 #define PCI_RX_FIFO_STAT   (MBarGlobal+MBAR_SCPCI+0x0C5)
0053 #define PCI_RX_FIFO_GRAN   (MBarGlobal+MBAR_SCPCI+0x0C8)
0054 #define PCI_RX_FIFO_ALARM  (MBarGlobal+MBAR_SCPCI+0x0CE)
0055 
0056 
0057 #define FEC_RX_FIFO        (MBarGlobal+MBAR_ETHERNET+0x184)
0058 #define FEC_RX_FIFO_STAT   (MBarGlobal+MBAR_ETHERNET+0x188)
0059 #define FEC_RX_FIFO_GRAN   (MBarGlobal+MBAR_ETHERNET+0x18C)
0060 #define FEC_RX_FIFO_ALARM  (MBarGlobal+MBAR_ETHERNET+0x198)
0061 
0062 #define FEC_TX_FIFO        (MBarGlobal+MBAR_ETHERNET+0x1A4)
0063 #define FEC_TX_FIFO_STAT   (MBarGlobal+MBAR_ETHERNET+0x1A8)
0064 #define FEC_TX_FIFO_GRAN   (MBarGlobal+MBAR_ETHERNET+0x1AC)
0065 #define FEC_TX_FIFO_ALARM  (MBarGlobal+MBAR_ETHERNET+0x1B8)
0066 
0067 #endif  /* __TASK_API_BESTCOMM_API_MEM_H */