generic_or1k/start/start.S

0001 /*
0002  * Copyright (c) 2014-2015 Hesham ALMatary <heshamelmatary@gmail.com>
0003  *
0004  *  The license and distribution terms for this file may be
0005  *  found in the file LICENSE in this distribution or at
0006  *  http://www.rtems.org/license/LICENSE
0007  */
0008 #include <bsp/linker-symbols.h>
0009
0010 /* The following macro defines the first instructions every exception
0011  * should execute before jumping to its handler function from the
0012  * exception vector table. r3 is saved into the stack and loaded with
0013  * vector number before jumping to _ISR_Handler. r3 value is restored
0014  * back from _ISR_Handler after handling the exception and before
0015  * returning from interrupt.
0016  */
0017 #define EXCEPTION_SETUP(vector) \
0018   l.nop   ;\
0019   l.addi  r1, r1, -200 ;\
0020   l.sw    0(r1), r3; \
0021   l.addi  r3, r0, vector; \
0022   l.j     _ISR_Handler; \
0023   l.nop
0024
0025   .extern boot_card
0026   .extern bsp_section_bss_begin
0027   .extern bsp_section_bss_end
0028
0029   .extern  bsp_start_vector_table_end
0030   .extern  bsp_start_vector_table_size
0031   .extern  bsp_vector_table_size
0032   .extern  _ISR_Stack_area_end
0033
0034   .extern exception_frame_save
0035   .extern _OR1K_Exception_Process
0036   .extern _OR1K_Exception_default
0037   .extern rtems_clock_tick
0038   .extern _exit
0039   .extern printk
0040   .extern bsp_interrupt_handler_default
0041
0042   /* Global symbols */
0043   .global  _start
0044   .global bsp_start_vector_table_begin
0045
0046 /* Popualte HW vector table */
0047
0048 .section .vector, "ax"
0049
0050 .org 0x100
0051 _reset:
0052   l.j _start
0053   l.nop
0054
0055 .org 0x200
0056 _buserr:
0057   EXCEPTION_SETUP(2)
0058
0059 .org 0x300
0060 _dPageFault:
0061   EXCEPTION_SETUP(3)
0062
0063 .org 0x400
0064 _iPageFaule:
0065   EXCEPTION_SETUP(4)
0066
0067 .org 0x500
0068 _timer:
0069   EXCEPTION_SETUP(5)
0070
0071 .org 0x600
0072 _unalign:
0073   EXCEPTION_SETUP(6)
0074
0075 .org 0x700
0076 _undefIns:
0077   EXCEPTION_SETUP(7)
0078
0079 .org 0x800
0080 _exInt:
0081   EXCEPTION_SETUP(8)
0082
0083 .org 0x900
0084 _dTLB:
0085   EXCEPTION_SETUP(9)
0086
0087 .org 0xA00
0088 _iTLB:
0089   EXCEPTION_SETUP(10)
0090
0091 .org 0xB00
0092 _range:
0093   EXCEPTION_SETUP(11)
0094
0095 .org 0xC00
0096 _syscall:
0097   EXCEPTION_SETUP(12)
0098
0099 .org 0xD00
0100 _fp:
0101   EXCEPTION_SETUP(13)
0102
0103 .org 0xE00
0104 _trap:
0105   EXCEPTION_SETUP(14)
0106
0107 .org 0xF00
0108 _undef1:
0109   EXCEPTION_SETUP(15)
0110
0111 .org 0x1500
0112 _undef2:
0113   EXCEPTION_SETUP(16)
0114
0115 .org 0x1900
0116 _undef3:
0117   EXCEPTION_SETUP(17)
0118
0119 .org 0x1F00
0120
0121 bsp_start_vector_table_begin:
0122
0123   .word 0
0124   .word _start /* Reset */
0125   .word _OR1K_Exception_default /* Bus Error */
0126   .word _OR1K_Exception_default /* Data Page Fault */
0127   .word _OR1K_Exception_default /* Instruction Page Fault */
0128   .word _OR1K_Exception_default /* Tick timer */
0129   .word _OR1K_Exception_default /* Alignment */
0130   .word _OR1K_Exception_default /* Undefiend Instruction */
0131   .word _OR1K_Exception_default /* External Interrupt */
0132   .word _OR1K_Exception_default /* Data TLB Miss */
0133   .word _OR1K_Exception_default /* Instruction TLB Miss */
0134   .word _OR1K_Exception_default /* Range Exception */
0135   .word _OR1K_Exception_default /* System Call */
0136   .word _OR1K_Exception_default /* Floating Point Exception */
0137   .word _OR1K_Exception_default /* Trap */
0138   .word _OR1K_Exception_default /* Reserver for future use */
0139   .word _OR1K_Exception_default /* Reserved for implementation-specific */
0140   .word _OR1K_Exception_default /* Reserved for custom exceptions. */
0141
0142 bsp_start_vector_table_end:
0143
0144   .section  ".bsp_start_text", "ax"
0145   .type _start,@function
0146
0147 _start:
0148   /* Set SR register to Supervision mode */
0149   l.ori  r1, r0, 0x1
0150   l.mtspr r0, r1, 17
0151
0152   /* load stack and frame pointers */
0153   l.movhi r1, hi(_ISR_Stack_area_end)
0154   l.ori   r1, r1, lo(_ISR_Stack_area_end)
0155   l.add   r2, r0, r1
0156
0157 /* Clearing .bss */
0158   l.movhi r13, hi(bsp_section_bss_begin)
0159   l.ori   r13, r13, lo(bsp_section_bss_begin)
0160   l.movhi r15, hi(bsp_section_bss_end)
0161   l.ori   r15, r15, lo(bsp_section_bss_end)
0162
0163 _loop_clear_bss:
0164   l.sfgeu r13, r15
0165   l.bf    _end_clear_bss
0166   l.addi  r13, r13, 4
0167   l.sw    0(r13), r0
0168   l.j     _loop_clear_bss
0169   l.nop
0170 _end_clear_bss:
0171
0172   l.j boot_card
0173   l.nop
0174
0175 /* Temporary code for unhandled exceptions */
0176 .section .text
0177 .align
0178 .global _unhandled_exception
0179
0180 unhandled_exception:
0181   l.nop