generic_or1k/clock/clockdrv.c

0001 /**
0002  * @file
0003  *
0004  * @ingroup RTEMSDriverClockImpl
0005  *
0006  * @brief This source file contains the implementation of the or1k Clock
0007  *   Driver.
0008  */
0009
0010 /*
0011  * COPYRIGHT (c) 2014-2015 Hesham ALMatary <heshamelmatary@gmail.com>
0012  *
0013  * The license and distribution terms for this file may be
0014  * found in the file LICENSE in this distribution or at
0015  * http://www.rtems.org/license/LICENSE
0016  */
0017
0018 #include <rtems.h>
0019 #include <bsp.h>
0020 #include <bsp/irq.h>
0021 #include <bsp/generic_or1k.h>
0022 #include <rtems/score/cpu.h>
0023 #include <rtems/score/or1k-utility.h>
0024 #include <rtems/timecounter.h>
0025
0026 /* The number of clock cycles before generating a tick timer interrupt. */
0027 #define TTMR_NUM_OF_CLOCK_TICKS_INTERRUPT     0x09ED9
0028 #define OR1K_CLOCK_CYCLE_TIME_NANOSECONDS     10
0029
0030 static struct timecounter or1ksim_tc;
0031
0032 /* CPU counter */
0033 static CPU_Counter_ticks cpu_counter_ticks;
0034
0035 static void generic_or1k_clock_at_tick(void)
0036 {
0037   uint32_t TTMR;
0038
0039  /* For TTMR register,
0040   * The least significant 28 bits are the number of clock cycles
0041   * before generating a tick timer interrupt. While the most
0042   * significant 4 bits are used for mode configuration, tick timer
0043   * interrupt enable and pending interrupts status.
0044   */
0045   TTMR = (CPU_OR1K_SPR_TTMR_MODE_RESTART | CPU_OR1K_SPR_TTMR_IE |
0046            (TTMR_NUM_OF_CLOCK_TICKS_INTERRUPT & CPU_OR1K_SPR_TTMR_TP_MASK)
0047          ) & ~(CPU_OR1K_SPR_TTMR_IP);
0048
0049   _OR1K_mtspr(CPU_OR1K_SPR_TTMR, TTMR);
0050   _OR1K_mtspr(CPU_OR1K_SPR_TTCR, 0);
0051
0052   cpu_counter_ticks += TTMR_NUM_OF_CLOCK_TICKS_INTERRUPT;
0053 }
0054
0055 static void generic_or1k_clock_handler_install(CPU_ISR_handler new_isr)
0056 {
0057   rtems_status_code sc = RTEMS_SUCCESSFUL;
0058   _CPU_ISR_install_vector(OR1K_EXCEPTION_TICK_TIMER,
0059                           new_isr,
0060                           NULL);
0061
0062   if (sc != RTEMS_SUCCESSFUL) {
0063     rtems_fatal_error_occurred(0xdeadbeef);
0064   }
0065 }
0066
0067 static uint32_t or1ksim_get_timecount(struct timecounter *tc)
0068 {
0069   uint32_t ticks_since_last_timer_interrupt;
0070
0071   ticks_since_last_timer_interrupt = _OR1K_mfspr(CPU_OR1K_SPR_TTCR);
0072
0073   return cpu_counter_ticks + ticks_since_last_timer_interrupt;
0074 }
0075
0076 CPU_Counter_ticks _CPU_Counter_read(void)
0077 {
0078   return or1ksim_get_timecount(NULL);
0079 }
0080
0081 static void generic_or1k_clock_initialize(void)
0082 {
0083   uint64_t frequency = (1000000000 / OR1K_CLOCK_CYCLE_TIME_NANOSECONDS);
0084   uint32_t TTMR;
0085
0086  /* For TTMR register,
0087   * The least significant 28 bits are the number of clock cycles
0088   * before generating a tick timer interrupt. While the most
0089   * significant 4 bits are used for mode configuration, tick timer
0090   * interrupt enable and pending interrupts status.
0091   */
0092
0093   /* FIXME: Long interval should pass since initializing the tick timer
0094    * registers fires exceptions dispite interrupts has not been enabled yet.
0095    */
0096   TTMR = (CPU_OR1K_SPR_TTMR_MODE_RESTART | CPU_OR1K_SPR_TTMR_IE |
0097            (0xFFED9 & CPU_OR1K_SPR_TTMR_TP_MASK)
0098          ) & ~(CPU_OR1K_SPR_TTMR_IP);
0099
0100   _OR1K_mtspr(CPU_OR1K_SPR_TTMR, TTMR);
0101   _OR1K_mtspr(CPU_OR1K_SPR_TTCR, 0);
0102
0103   /* Initialize timecounter */
0104   or1ksim_tc.tc_get_timecount = or1ksim_get_timecount;
0105   or1ksim_tc.tc_counter_mask = 0xffffffff;
0106   or1ksim_tc.tc_frequency = frequency;
0107   or1ksim_tc.tc_quality = RTEMS_TIMECOUNTER_QUALITY_CLOCK_DRIVER;
0108   rtems_timecounter_install(&or1ksim_tc);
0109 }
0110
0111 #define Clock_driver_support_at_tick(arg) generic_or1k_clock_at_tick()
0112
0113 #define Clock_driver_support_initialize_hardware() generic_or1k_clock_initialize()
0114
0115 #define Clock_driver_support_install_isr(isr) \
0116   generic_or1k_clock_handler_install(isr)
0117
0118 #include "../../../shared/dev/clock/clockimpl.h"