nios2_iss/start/start.S

0001 /*  NIOS2 startup code
0002  *
0003  *  This is the entry point on reset and when loading the
0004  *  executive from a bootloader.
0005  *
0006  *  COPYRIGHT (c) 2005-2006 Kolja Waschk rtemsdev/ixo.de
0007  *
0008  *  The license and distribution terms for this file may be
0009  *  found in the file LICENSE in this distribution or at
0010  *  http://www.rtems.org/license/LICENSE.
0011  */
0012
0013      .section .entry
0014      .align    3
0015      movhi  et, %hiadj(start)
0016      addi   et, et, %lo(start)
0017      jmp    et
0018
0019      .section .irq
0020      .align 3
0021      movhi  et, %hiadj(_exception_vector)
0022      addi   et, et, %lo(_exception_vector)
0023      jmp    et
0024
0025     .section .text
0026     .align  3
0027     .globl  start
0028     .type   start,@function
0029
0030     .extern _exception_vector
0031
0032 start:
0033     #------------------------------------------------------
0034     # disable interrupts
0035     wrctl status, zero
0036     wrctl ienable, zero
0037
0038     #------------------------------------------------------
0039     # invalidate instruction cache
0040     mov r2, r0
0041     movhi r3, %hi(__nios2_icache_size)
0042     ori r3, r3, %lo(__nios2_icache_size)
0043 icache_init_loop:
0044     initi r2
0045     addi r2, r2, __nios2_icache_line_size
0046     bltu r2, r3, icache_init_loop
0047
0048     #------------------------------------------------------
0049     # invalidate data cache
0050     mov r2, r0
0051     movhi r3, %hi(__nios2_dcache_size)
0052     ori r3, r3, %lo(__nios2_dcache_size)
0053 dcache_init_loop:
0054     initd 0(r2)
0055     addi r2, r2, __nios2_dcache_line_size
0056     bltu r2, r3, dcache_init_loop
0057
0058     #------------------------------------------------------
0059     # initialize stack pointer
0060     movhi   sp, %hiadj(__alt_stack_pointer - 4)
0061     addi    sp, sp, %lo(__alt_stack_pointer - 4)
0062
0063     # initialize global pointer
0064     movhi gp, %hiadj(_gp)
0065     addi gp, gp, %lo(_gp)
0066
0067     # initialize exception tmp register
0068     movhi et, %hiadj(_end)
0069     addi et, et, %lo(_end)
0070
0071     #------------------------------------------------------
0072     # TODO: copy data from flash to RAM, if not there already
0073     # For now its save to assume it is there already when we're
0074     # loading code though JTAG into RAM-only system
0075
0076     # at least copy exception code to right place
0077     movhi r2, %hiadj(__ram_exceptions_start)
0078     addi r2, r2, %lo(__ram_exceptions_start)
0079
0080     movhi r3, %hiadj(brto_ev)
0081     addi r3, r3, %lo(brto_ev)
0082     ldw r4,  0(r3)
0083     stw r4,  0(r2)
0084     ldw r4,  4(r3)
0085     stw r4,  4(r2)
0086     ldw r4,  8(r3)
0087     stw r4,  8(r2)
0088     ldw r4, 12(r3)
0089     stw r4, 12(r2)
0090
0091     #------------------------------------------------------
0092     # clear bss
0093     movhi r2, %hiadj(__bss_start)
0094     addi r2, r2, %lo(__bss_start)
0095
0096     movhi r3, %hiadj(__bss_end)
0097     addi r3, r3, %lo(__bss_end)
0098
0099     beq r2, r3, 1f
0100 0:
0101     stw zero, (r2)
0102     addi r2, r2, 4
0103     bltu r2, r3, 0b
0104 1:
0105     #------------------------------------------------------
0106     # jump to (shared) boot_card (never comes back)
0107     # use configuration defined stack
0108     movhi   sp, %hiadj(_ISR_Stack_area_end - 4)
0109     addi    sp, sp, %lo(_ISR_Stack_area_end - 4)
0110     mov r4, zero
0111     mov r5, zero
0112     mov r6, zero
0113     call    boot_card
0114     # but just in case it does come back, stick here.
0115 _stuck_in_start:
0116     br _stuck_in_start
0117
0118     #------------------------------------------------------
0119     # code to be placed at exception address
0120 brto_ev:
0121      movhi et, %hiadj(_exception_vector)
0122      addi et, et, %lo(_exception_vector)
0123      jmp et
0124
0125