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0041
0042 #ifndef LIBBSP_NIOS2_NIOS2_ISS_BSP_H
0043 #define LIBBSP_NIOS2_NIOS2_ISS_BSP_H
0044
0045
0046
0047
0048
0049
0050
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0054
0055 #include <stdint.h>
0056 #include <bspopts.h>
0057 #include <bsp/default-initial-extension.h>
0058
0059 #include <rtems.h>
0060
0061 #ifdef __cplusplus
0062 extern "C" {
0063 #endif
0064
0065
0066
0067
0068
0069 #define SYSTEM_BUS_WIDTH 32
0070
0071 #define JTAG_UART_BASE 0x08000000
0072 #define JTAG_UART_IRQ 2
0073
0074 #define CLOCK_BASE 0x08001000
0075 #define CLOCK_FREQ 50000000
0076 #define CLOCK_VECTOR 1
0077
0078 #define TIMER_BASE 0x08002000
0079 #define TIMER_FREQ 50000000
0080 #define TIMER_VECTOR 3
0081
0082
0083
0084 #define NIOS2_BYPASS_CACHE ((uint32_t)0x80000000ul)
0085 #define NIOS2_IO_BASE(x) ( (void*) ((uint32_t)x | NIOS2_BYPASS_CACHE ) )
0086 #define NIOS2_IENABLE(x) do{ __builtin_wrctl(3,__builtin_rdctl(3)|x);}while(0)
0087 #define NIOS2_IRQ_ENABLE(x) do {__builtin_wrctl(3,__builtin_rdctl(3)|x);} while(0)
0088
0089
0090
0091
0092 #ifndef SYSTEM_BUS_WIDTH
0093 #error SYSTEM_BUS_WIDTH is undefined
0094 #endif
0095
0096 #if SYSTEM_BUS_WIDTH != 32
0097 #error Only SYSTEM_BUS_WIDTH 32 is supported
0098 #endif
0099
0100 typedef struct
0101 {
0102 volatile uint32_t status;
0103 volatile uint32_t control;
0104 volatile uint32_t period_lo;
0105 volatile uint32_t period_hi;
0106 volatile uint32_t snap_lo;
0107 volatile uint32_t snap_hi;
0108 }
0109 altera_avalon_timer_regs;
0110
0111 #define ALTERA_AVALON_TIMER_STATUS_TO_MSK (0x1)
0112 #define ALTERA_AVALON_TIMER_STATUS_TO_OFST (0)
0113 #define ALTERA_AVALON_TIMER_STATUS_RUN_MSK (0x2)
0114 #define ALTERA_AVALON_TIMER_STATUS_RUN_OFST (1)
0115
0116 #define ALTERA_AVALON_TIMER_CONTROL_ITO_MSK (0x1)
0117 #define ALTERA_AVALON_TIMER_CONTROL_ITO_OFST (0)
0118 #define ALTERA_AVALON_TIMER_CONTROL_CONT_MSK (0x2)
0119 #define ALTERA_AVALON_TIMER_CONTROL_CONT_OFST (1)
0120 #define ALTERA_AVALON_TIMER_CONTROL_START_MSK (0x4)
0121 #define ALTERA_AVALON_TIMER_CONTROL_START_OFST (2)
0122 #define ALTERA_AVALON_TIMER_CONTROL_STOP_MSK (0x8)
0123 #define ALTERA_AVALON_TIMER_CONTROL_STOP_OFST (3)
0124
0125 typedef struct
0126 {
0127 volatile uint32_t data;
0128 volatile uint32_t control;
0129 }
0130 altera_avalon_jtag_uart_regs;
0131
0132 #define ALTERA_AVALON_JTAG_UART_DATA_DATA_MSK (0x000000FFu)
0133 #define ALTERA_AVALON_JTAG_UART_DATA_DATA_OFST (0)
0134 #define ALTERA_AVALON_JTAG_UART_DATA_RVALID_MSK (0x00008000u)
0135 #define ALTERA_AVALON_JTAG_UART_DATA_RVALID_OFST (15)
0136 #define ALTERA_AVALON_JTAG_UART_DATA_RAVAIL_MSK (0xFFFF0000u)
0137 #define ALTERA_AVALON_JTAG_UART_DATA_RAVAIL_OFST (16)
0138
0139 #define ALTERA_AVALON_JTAG_UART_CONTROL_RE_MSK (0x00000001u)
0140 #define ALTERA_AVALON_JTAG_UART_CONTROL_RE_OFST (0)
0141 #define ALTERA_AVALON_JTAG_UART_CONTROL_WE_MSK (0x00000002u)
0142 #define ALTERA_AVALON_JTAG_UART_CONTROL_WE_OFST (1)
0143 #define ALTERA_AVALON_JTAG_UART_CONTROL_RI_MSK (0x00000100u)
0144 #define ALTERA_AVALON_JTAG_UART_CONTROL_RI_OFST (8)
0145 #define ALTERA_AVALON_JTAG_UART_CONTROL_WI_MSK (0x00000200u)
0146 #define ALTERA_AVALON_JTAG_UART_CONTROL_WI_OFST (9)
0147 #define ALTERA_AVALON_JTAG_UART_CONTROL_AC_MSK (0x00000400u)
0148 #define ALTERA_AVALON_JTAG_UART_CONTROL_AC_OFST (10)
0149 #define ALTERA_AVALON_JTAG_UART_CONTROL_WSPACE_MSK (0xFFFF0000u)
0150 #define ALTERA_AVALON_JTAG_UART_CONTROL_WSPACE_OFST (16)
0151
0152
0153
0154
0155
0156 rtems_isr_entry set_vector(
0157 rtems_isr_entry handler,
0158 rtems_vector_number vector,
0159 int type
0160 );
0161
0162 #ifdef __cplusplus
0163 }
0164 #endif
0165
0166
0167
0168 #endif
0169