shared/irq/vectorexceptions.c

0001 /* SPDX-License-Identifier: BSD-2-Clause */
0002
0003 /**
0004  *  @file
0005  *
0006  *  Common Code for Vectoring MIPS Exceptions
0007  *
0008  *  The actual decoding of the cause register and vector number assignment
0009  *  is CPU model specific.
0010  */
0011
0012 /*
0013  *  COPYRIGHT (c) 1989-2012.
0014  *  On-Line Applications Research Corporation (OAR).
0015  *
0016  * Redistribution and use in source and binary forms, with or without
0017  * modification, are permitted provided that the following conditions
0018  * are met:
0019  * 1. Redistributions of source code must retain the above copyright
0020  *    notice, this list of conditions and the following disclaimer.
0021  * 2. Redistributions in binary form must reproduce the above copyright
0022  *    notice, this list of conditions and the following disclaimer in the
0023  *    documentation and/or other materials provided with the distribution.
0024  *
0025  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
0026  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
0027  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
0028  * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
0029  * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
0030  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
0031  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
0032  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
0033  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
0034  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
0035  * POSSIBILITY OF SUCH DAMAGE.
0036  */
0037
0038 #include <rtems.h>
0039 #include <inttypes.h>
0040 #include <stdlib.h>
0041 #include <string.h>
0042 #include <rtems/mips/iregdef.h>
0043 #include <rtems/mips/idtcpu.h>
0044 #include <rtems/bspIo.h>
0045 #include <bsp/irq-generic.h>
0046
0047 struct regdef
0048 {
0049   int  offset;
0050   char *name;
0051 };
0052
0053 static const struct regdef dumpregs[]= {
0054   { R_RA, "R_RA" }, { R_V0, "R_V0" },     { R_V1, "R_V1" },
0055   { R_A0, "R_A0" }, { R_A1, "R_A1" },     { R_A2, "R_A2" },
0056   { R_A3, "R_A3" }, { R_T0, "R_T0" },     { R_T1, "R_T1" },
0057   { R_T2, "R_T2" }, { R_T3, "R_T3" },     { R_T4, "R_T4" },
0058   { R_T5, "R_T5" }, { R_T6, "R_T6" },     { R_T7, "R_T7" },
0059   { R_T8, "R_T8" }, { R_MDLO, "R_MDLO" }, { R_MDHI, "R_MDHI" },
0060   { R_GP, "R_GP" }, { R_FP, "R_FP" },     { R_AT, "R_AT" },
0061   { R_EPC,"R_EPC"}, { -1, NULL }
0062 };
0063
0064 void _CPU_Exception_frame_print( const CPU_Exception_frame *frame )
0065 {
0066   uint32_t *frame_u32;
0067   int   i, j;
0068
0069   frame_u32 = (uint32_t *)frame;
0070   for(i=0; dumpregs[i].offset > -1; i++)
0071   {
0072      printk("   %s", dumpregs[i].name);
0073      for(j=0; j< 7-strlen(dumpregs[i].name); j++) printk(" ");
0074 #if (__mips == 1 ) || (__mips == 32)
0075      printk("  %08" PRIu32 "%c",
0076             frame_u32[dumpregs[i].offset], (i%3) ? '\t' : '\n' );
0077 #elif __mips == 3
0078      printk("  %08" PRIu32 "", frame_u32[2 * dumpregs[i].offset + 1] );
0079      printk("%08" PRIu32 "%c",
0080             frame_u32[2 * dumpregs[i].offset], (i%2) ? '\t' : '\n' );
0081 #endif
0082   }
0083   printk( "\n" );
0084 }
0085
0086 /*
0087  *  There are constants defined for these but they should basically
0088  *  all be close to the same set.
0089  */
0090
0091 void mips_vector_exceptions( CPU_Interrupt_frame *frame )
0092 {
0093   uint32_t   cause;
0094   uint32_t   exc;
0095
0096   mips_get_cause( cause );
0097   exc = (cause >> 2) & 0x1f;
0098
0099   bsp_interrupt_handler_dispatch( exc );
0100 }