shared/irq/irq.c

0001 /**
0002  * @file
0003  *
0004  * @ingroup RTEMSImplClassicIntr
0005  *
0006  * @brief Interrupt support.
0007  */
0008
0009 /*
0010  *  Copyright (c) 2005 by Cogent Computer Systems
0011  *  Written by Jay Monkman <jtm@lopingdog.com>
0012  *
0013  *  COPYRIGHT (c) 1989-2012.
0014  *  On-Line Applications Research Corporation (OAR).
0015  *
0016  *  The license and distribution terms for this file may be
0017  *  found in the file LICENSE in this distribution or at
0018  *  http://www.rtems.org/license/LICENSE.
0019  */
0020
0021
0022 #include <inttypes.h>
0023
0024 #include <bsp.h>
0025 #include <bsp/irq.h>
0026 #include <bsp/irq-generic.h>
0027 #include <libcpu/isr_entries.h>
0028 #include <rtems/bspIo.h>
0029
0030 static const char *const cause_strings[32] = {
0031   /*  0 */ "Int",
0032   /*  1 */ "TLB Mods",
0033   /*  2 */ "TLB Load",
0034   /*  3 */ "TLB Store",
0035   /*  4 */ "Address Load",
0036   /*  5 */ "Address Store",
0037   /*  6 */ "Instruction Bus Error",
0038   /*  7 */ "Data Bus Error",
0039   /*  8 */ "Syscall",
0040   /*  9 */ "Breakpoint",
0041   /* 10 */ "Reserved Instruction",
0042   /* 11 */ "Coprocessor Unuseable",
0043   /* 12 */ "Overflow",
0044   /* 13 */ "Trap",
0045   /* 14 */ "Instruction Virtual Coherency Error",
0046   /* 15 */ "FP Exception",
0047   /* 16 */ "Reserved 16",
0048   /* 17 */ "Reserved 17",
0049   /* 18 */ "Reserved 18",
0050   /* 19 */ "Reserved 19",
0051   /* 20 */ "Reserved 20",
0052   /* 21 */ "Reserved 21",
0053   /* 22 */ "Reserved 22",
0054   /* 23 */ "Watch",
0055   /* 24 */ "Reserved 24",
0056   /* 25 */ "Reserved 25",
0057   /* 26 */ "Reserved 26",
0058   /* 27 */ "Reserved 27",
0059   /* 28 */ "Reserved 28",
0060   /* 29 */ "Reserved 29",
0061   /* 30 */ "Reserved 30",
0062   /* 31 */ "Data Virtual Coherency Error"
0063 };
0064
0065 static inline bool bsp_irq_is_valid(rtems_vector_number vector)
0066 {
0067   return vector < BSP_INTERRUPT_VECTOR_COUNT;
0068 }
0069
0070 rtems_status_code bsp_interrupt_get_attributes(
0071   rtems_vector_number         vector,
0072   rtems_interrupt_attributes *attributes
0073 )
0074 {
0075   return RTEMS_SUCCESSFUL;
0076 }
0077
0078 rtems_status_code bsp_interrupt_is_pending(
0079   rtems_vector_number vector,
0080   bool               *pending
0081 )
0082 {
0083   bsp_interrupt_assert(bsp_interrupt_is_valid_vector(vector));
0084   bsp_interrupt_assert(pending != NULL);
0085   *pending = false;
0086   return RTEMS_UNSATISFIED;
0087 }
0088
0089 rtems_status_code bsp_interrupt_raise(rtems_vector_number vector)
0090 {
0091   bsp_interrupt_assert(bsp_interrupt_is_valid_vector(vector));
0092   return RTEMS_UNSATISFIED;
0093 }
0094
0095 rtems_status_code bsp_interrupt_clear(rtems_vector_number vector)
0096 {
0097   bsp_interrupt_assert(bsp_interrupt_is_valid_vector(vector));
0098   return RTEMS_UNSATISFIED;
0099 }
0100
0101 rtems_status_code bsp_interrupt_vector_is_enabled(
0102   rtems_vector_number vector,
0103   bool               *enabled
0104 )
0105 {
0106   bsp_interrupt_assert(bsp_interrupt_is_valid_vector(vector));
0107   bsp_interrupt_assert(enabled != NULL);
0108   *enabled = false;
0109   return RTEMS_UNSATISFIED;
0110 }
0111
0112 rtems_status_code bsp_interrupt_vector_enable(rtems_vector_number vector)
0113 {
0114   bsp_interrupt_assert(bsp_interrupt_is_valid_vector(vector));
0115   return RTEMS_SUCCESSFUL;
0116 }
0117
0118 rtems_status_code bsp_interrupt_vector_disable(rtems_vector_number vector)
0119 {
0120   bsp_interrupt_assert(bsp_interrupt_is_valid_vector(vector));
0121   return RTEMS_SUCCESSFUL;
0122 }
0123
0124 rtems_status_code bsp_interrupt_set_priority(
0125   rtems_vector_number vector,
0126   uint32_t priority
0127 )
0128 {
0129   bsp_interrupt_assert(bsp_interrupt_is_valid_vector(vector));
0130   return RTEMS_UNSATISFIED;
0131 }
0132
0133 rtems_status_code bsp_interrupt_get_priority(
0134   rtems_vector_number vector,
0135   uint32_t *priority
0136 )
0137 {
0138   bsp_interrupt_assert(bsp_interrupt_is_valid_vector(vector));
0139   bsp_interrupt_assert(priority != NULL);
0140   return RTEMS_UNSATISFIED;
0141 }
0142
0143 void bsp_interrupt_facility_initialize(void)
0144 {
0145   mips_install_isr_entries();
0146 }
0147
0148 void bsp_interrupt_handler_default(rtems_vector_number vector)
0149 {
0150   uint32_t sr;
0151   uint32_t cause;
0152
0153   mips_get_sr( sr );
0154   mips_get_cause( cause );
0155
0156   printk( "Unhandled exception %" PRId32 "\n", vector );
0157   printk( "sr: 0x%08" PRIu32 "  cause: 0x%08" PRIu32 " --> %s\n", sr, cause,
0158      cause_strings[(cause >> 2) &0x1f] );
0159   #if 0
0160     mips_dump_exception_frame( frame );
0161   #endif
0162   rtems_fatal_error_occurred(1);
0163 }