include/bsp/irq.h

0001 /* SPDX-License-Identifier: BSD-2-Clause */
0002
0003 /**
0004  * @file
0005  *
0006  * @ingroup RTEMSImplClassicIntr
0007  *
0008  * @brief Malta Interrupt Definitions
0009  */
0010
0011 /*
0012  *  COPYRIGHT (c) 1989-2012.
0013  *  On-Line Applications Research Corporation (OAR).
0014  *
0015  * Redistribution and use in source and binary forms, with or without
0016  * modification, are permitted provided that the following conditions
0017  * are met:
0018  * 1. Redistributions of source code must retain the above copyright
0019  *    notice, this list of conditions and the following disclaimer.
0020  * 2. Redistributions in binary form must reproduce the above copyright
0021  *    notice, this list of conditions and the following disclaimer in the
0022  *    documentation and/or other materials provided with the distribution.
0023  *
0024  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
0025  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
0026  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
0027  * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
0028  * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
0029  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
0030  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
0031  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
0032  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
0033  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
0034  * POSSIBILITY OF SUCH DAMAGE.
0035  */
0036
0037 #ifndef LIBBSP_MIPS_MALTA_IRQ_H
0038 #define LIBBSP_MIPS_MALTA_IRQ_H
0039
0040 #ifndef ASM
0041   #include <rtems.h>
0042   #include <rtems/irq.h>
0043   #include <rtems/irq-extension.h>
0044   #include <rtems/score/mips.h>
0045 #endif
0046
0047 /**
0048  * @addtogroup RTEMSImplClassicIntr
0049  *
0050  * @{
0051  */
0052
0053 /*
0054  *  Interrupt Vector Numbers
0055  *
0056  *  NOTE: Numbers 0-15 directly map to levels on the IRC.
0057  *        Number 16 is "1xxxx" per p. 164 of the TX3904 manual.
0058  */
0059 #define MALTA_CPU_INT_START           MIPS_INTERRUPT_BASE+0
0060 #define MALTA_CPU_INT_SW0             MALTA_CPU_INT_START+0
0061 #define MALTA_CPU_INT_SW2             MALTA_CPU_INT_START+1
0062 #define MALTA_CPU_INT0                MALTA_CPU_INT_START+2
0063 #define MALTA_CPU_INT1                MALTA_CPU_INT_START+3
0064 #define MALTA_CPU_INT2                MALTA_CPU_INT_START+4
0065 #define MALTA_CPU_INT3                MALTA_CPU_INT_START+5
0066 #define MALTA_CPU_INT4                MALTA_CPU_INT_START+6
0067 #define MALTA_CPU_INT5                MALTA_CPU_INT_START+7
0068 #define MALTA_CPU_INT_LAST            MALTA_CPU_INT5
0069
0070 #define MALTA_SB_IRQ_START            MALTA_CPU_INT_LAST+1
0071 #define MALTA_SB_IRQ_0                MALTA_SB_IRQ_START+0
0072 #define MALTA_SB_IRQ_1                MALTA_SB_IRQ_START+1
0073 #define MALTA_SB_IRQ_2                MALTA_SB_IRQ_START+2
0074 #define MALTA_SB_IRQ_3                MALTA_SB_IRQ_START+3
0075 #define MALTA_SB_IRQ_4                MALTA_SB_IRQ_START+4
0076 #define MALTA_SB_IRQ_5                MALTA_SB_IRQ_START+5
0077 #define MALTA_SB_IRQ_6                MALTA_SB_IRQ_START+6
0078 #define MALTA_SB_IRQ_7                MALTA_SB_IRQ_START+7
0079 #define MALTA_SB_IRQ_8                MALTA_SB_IRQ_START+8
0080 #define MALTA_SB_IRQ_9                MALTA_SB_IRQ_START+9
0081 #define MALTA_SB_IRQ_10               MALTA_SB_IRQ_START+10
0082 #define MALTA_SB_IRQ_11               MALTA_SB_IRQ_START+11
0083 #define MALTA_SB_IRQ_12               MALTA_SB_IRQ_START+12
0084 #define MALTA_SB_IRQ_13               MALTA_SB_IRQ_START+13
0085 #define MALTA_SB_IRQ_14               MALTA_SB_IRQ_START+14
0086 #define MALTA_SB_IRQ_15               MALTA_SB_IRQ_START+15
0087 #define MALTA_SB_IRQ_LAST             MALTA_SB_IRQ_15
0088
0089 #define MALTA_PCI_ADP_START           MALTA_SB_IRQ_LAST+1
0090 #define MALTA_PCI_ADP20               MALTA_PCI_ADP_START+0
0091 #define MALTA_PCI_ADP21               MALTA_PCI_ADP_START+1
0092 #define MALTA_PCI_ADP22               MALTA_PCI_ADP_START+2
0093 #define MALTA_PCI_ADP27               MALTA_PCI_ADP_START+3
0094 #define MALTA_PCI_ADP28               MALTA_PCI_ADP_START+4
0095 #define MALTA_PCI_ADP29               MALTA_PCI_ADP_START+5
0096 #define MALTA_PCI_ADP30               MALTA_PCI_ADP_START+6
0097 #define MALTA_PCI_ADP31               MALTA_PCI_ADP_START+7
0098 #define MALTA_PCI_ADP_LAST            MALTA_PCI_ADP31
0099 #
0100
0101 #define BSP_INTERRUPT_VECTOR_COUNT   (MALTA_PCI_ADP_LAST + 1)
0102
0103 /*
0104  * Redefine interrupts with more descriptive names.
0105  * The Generic ones above match the hardware name,
0106  * where these match the device name.
0107  */
0108 #define MALTA_INT_SOUTHBRIDGE_INTR             MALTA_CPU_INT0
0109 #define MALTA_INT_SOUTHBRIDGE_SMI              MALTA_CPU_INT1
0110 #define MALTA_INT_TTY2                         MALTA_CPU_INT2
0111 #define MALTA_INT_COREHI                       MALTA_CPU_INT3
0112 #define MALTA_INT_CORELO                       MALTA_CPU_INT4
0113 #define MALTA_INT_TICKER                       MALTA_CPU_INT5
0114
0115 #define MALTA_IRQ_TIMER_SOUTH_BRIDGE           MALTA_SB_IRQ_0
0116 #define MALTA_IRQ_KEYBOARD_SUPERIO             MALTA_SB_IRQ_1
0117 #define MALTA_IRQ_RESERVED1_SOUTH_BRIDGE       MALTA_SB_IRQ_2
0118 #define MALTA_IRQ_TTY1                         MALTA_SB_IRQ_3
0119 #define MALTA_IRQ_TTY0                         MALTA_SB_IRQ_4
0120 #define MALTA_IRQ_NOT_USED                     MALTA_SB_IRQ_5
0121 #define MALTA_IRQ_FLOPPY_SUPERIO               MALTA_SB_IRQ_6
0122 #define MALTA_IRQ_PARALLEL_PORT_SUPERIO        MALTA_SB_IRQ_7
0123 #define MALTA_IRQ_REALTIME_CLOCK_SOUTH_BRIDGE  MALTA_SB_IRQ_8
0124 #define MALTA_IRQ_I2C_SOUTH_BRIDGE             MALTA_SB_IRQ_9
0125 /* PCI A, PCI B (including Ethernet) PCI slot 1..4, Ethernet */
0126 #define MALTA_IRQ_PCI_A_B                      MALTA_SB_IRQ_10
0127 /* PCI slot 1..4 (audio, USB)  */
0128 #define MALTA_IRQ_PCI_C_D                      MALTA_SB_IRQ_11
0129 #define MALTA_IRQ_MOUSE_SUPERIO                MALTA_SB_IRQ_12
0130 #define MALTA_IRQ_RESERVED2_SOUTH_BRIDGE       MALTA_SB_IRQ_13
0131 #define MALTA_IRQ_PRIMARY_IDE                  MALTA_SB_IRQ_14
0132 #define MALTA_IRQ_SECONDARY_IDE                MALTA_SB_IRQ_15
0133 #define MALTA_IRQ_SOUTH_BRIDGE    MALTA_PCI_ADP20
0134 #define MALTA_IRQ_ETHERNET        MALTA_IRQ_PCI_A_B
0135 #define MALTA_IRQ_AUDIO           MALTA_PCI_ADP22
0136 #define MALTA_IRQ_CORE_CARD       MALTA_PCI_ADP27
0137 #define MALTA_IRQ_PCI_CONNECTOR_1 MALTA_PCI_ADP28
0138 #define MALTA_IRQ_PCI_CONNECTOR_2 MALTA_PCI_ADP29
0139 #define MALTA_IRQ_PCI_CONNECTOR_3 MALTA_PCI_ADP30
0140 #define MALTA_IRQ_PCI_CONNECTOR_4 MALTA_PCI_ADP31
0141
0142 #ifndef ASM
0143
0144 #endif /* ASM */
0145
0146 /** @} */
0147
0148 #endif /* LIBBSP_MIPS_MALTA_IRQ_H */