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File indexing completed on 2025-05-11 08:23:50
0001 /* SPDX-License-Identifier: BSD-2-Clause */ 0002 0003 /** 0004 * @file 0005 * 0006 * TX3904 Interrupt Vectoring 0007 */ 0008 0009 /* 0010 * COPYRIGHT (c) 1989-2012. 0011 * On-Line Applications Research Corporation (OAR). 0012 * 0013 * Redistribution and use in source and binary forms, with or without 0014 * modification, are permitted provided that the following conditions 0015 * are met: 0016 * 1. Redistributions of source code must retain the above copyright 0017 * notice, this list of conditions and the following disclaimer. 0018 * 2. Redistributions in binary form must reproduce the above copyright 0019 * notice, this list of conditions and the following disclaimer in the 0020 * documentation and/or other materials provided with the distribution. 0021 * 0022 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 0023 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 0024 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 0025 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE 0026 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 0027 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 0028 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 0029 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 0030 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 0031 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 0032 * POSSIBILITY OF SUCH DAMAGE. 0033 */ 0034 0035 #include <rtems.h> 0036 #include <stdlib.h> 0037 #include <bsp/irq.h> 0038 #include <rtems/bspIo.h> /* for printk */ 0039 #include <bsp/irq-generic.h> 0040 #include <libcpu/isr_entries.h> 0041 0042 void mips_vector_isr_handlers( CPU_Interrupt_frame *frame ) 0043 { 0044 unsigned int sr; 0045 unsigned int cause; 0046 0047 mips_get_sr( sr ); 0048 mips_get_cause( cause ); 0049 0050 cause &= (sr & SR_IMASK); 0051 cause >>= CAUSE_IPSHIFT; 0052 0053 if ( cause & 0x80 ) /* IP[5] ==> INT0 */ 0054 bsp_interrupt_handler_dispatch( TX3904_IRQ_INT0 ); 0055 0056 if ( cause & 0x40 ) { /* (IP[4] == 1) ==> IP[0-3] are valid */ 0057 unsigned int v = (cause >> 2) & 0x0f; 0058 bsp_interrupt_handler_dispatch( MIPS_INTERRUPT_BASE + v ); 0059 } 0060 0061 if ( cause & 0x02 ) /* SW[0] */ 0062 bsp_interrupt_handler_dispatch( TX3904_IRQ_SOFTWARE_1 ); 0063 0064 if ( cause & 0x01 ) /* IP[1] */ 0065 bsp_interrupt_handler_dispatch( TX3904_IRQ_SOFTWARE_2 ); 0066 }
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