jmr3904/include/tm27.h

0001 /**
0002  *  @file
0003  */
0004
0005 /*
0006  *  The license and distribution terms for this file may be
0007  *  found in the file LICENSE in this distribution or at
0008  *  http://www.rtems.org/license/LICENSE.
0009  */
0010
0011 #ifndef _RTEMS_TMTEST27
0012 #error "This is an RTEMS internal file you must not include directly."
0013 #endif
0014
0015 #ifndef __tm27_h
0016 #define __tm27_h
0017
0018 /*
0019  *  Define the interrupt mechanism for Time Test 27
0020  */
0021
0022 #include <bsp/irq.h>
0023
0024 #define MUST_WAIT_FOR_INTERRUPT 1
0025
0026 #define Install_tm27_vector( handler ) \
0027    rtems_interrupt_handler_install( \
0028       TX3904_IRQ_TMR0, "benchmark", 0, \
0029       handler, NULL );
0030
0031 #define Cause_tm27_intr() \
0032   do { \
0033     uint32_t   _clicks = 20; \
0034     TX3904_TIMER_WRITE( TX3904_TIMER0_BASE, TX3904_TIMER_CCDR, 0x3 ); \
0035     TX3904_TIMER_WRITE( TX3904_TIMER0_BASE, TX3904_TIMER_CPRA, _clicks ); \
0036     TX3904_TIMER_WRITE( TX3904_TIMER0_BASE, TX3904_TIMER_TISR, 0x00 ); \
0037     TX3904_TIMER_WRITE( TX3904_TIMER0_BASE, TX3904_TIMER_ITMR, 0x8001 ); \
0038     TX3904_TIMER_WRITE( TX3904_TIMER0_BASE, TX3904_TIMER_TCR,   0xC0 ); \
0039     *((volatile uint32_t*) 0xFFFFC01C) = 0x00000700; \
0040   } while(0)
0041
0042 #define Clear_tm27_intr() \
0043   do { \
0044     TX3904_TIMER_WRITE( TX3904_TIMER0_BASE, TX3904_TIMER_ITMR, 0x0001 ); \
0045     TX3904_TIMER_WRITE( TX3904_TIMER0_BASE, TX3904_TIMER_CCDR, 0x3 ); \
0046     TX3904_TIMER_WRITE( TX3904_TIMER0_BASE, TX3904_TIMER_TISR,   0x00 ); \
0047   } while(0)
0048
0049 #define Lower_tm27_intr() \
0050   mips_enable_in_interrupt_mask( 0xff01 );
0051
0052 #endif