include/libcpu/isr_entries.h

0001 /* SPDX-License-Identifier: BSD-2-Clause */
0002
0003 /**
0004  *  @file
0005  *
0006  */
0007
0008 /*
0009  *  COPYRIGHT (c) 1989-2012.
0010  *  On-Line Applications Research Corporation (OAR).
0011  *
0012  * Redistribution and use in source and binary forms, with or without
0013  * modification, are permitted provided that the following conditions
0014  * are met:
0015  * 1. Redistributions of source code must retain the above copyright
0016  *    notice, this list of conditions and the following disclaimer.
0017  * 2. Redistributions in binary form must reproduce the above copyright
0018  *    notice, this list of conditions and the following disclaimer in the
0019  *    documentation and/or other materials provided with the distribution.
0020  *
0021  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
0022  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
0023  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
0024  * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
0025  * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
0026  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
0027  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
0028  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
0029  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
0030  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
0031  * POSSIBILITY OF SUCH DAMAGE.
0032  */
0033
0034 #ifndef _ISR_ENTRIES_H
0035 #define _ISR_ENTRIES_H 1
0036
0037 #include <rtems/score/cpuimpl.h>
0038
0039 extern void mips_install_isr_entries( void );
0040 extern void mips_vector_isr_handlers( CPU_Interrupt_frame *frame );
0041
0042 #if __mips == 1
0043 extern void exc_utlb_code(void);
0044 extern void exc_dbg_code(void);
0045 extern void exc_norm_code(void);
0046 #elif __mips == 32
0047 extern void exc_tlb_code(void);
0048 extern void exc_xtlb_code(void);
0049 extern void exc_cache_code(void);
0050 extern void exc_norm_code(void);
0051 #elif __mips == 3
0052 extern void exc_tlb_code(void);
0053 extern void exc_xtlb_code(void);
0054 extern void exc_cache_code(void);
0055 extern void exc_norm_code(void);
0056 #endif
0057
0058 #endif