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File indexing completed on 2025-05-11 08:23:50

0001 /**
0002  *  @file
0003  *  
0004  *  This file contains the clock driver initialization for the Hurricane BSP.
0005  */
0006 
0007 /*
0008  *  Author:     Craig Lebakken <craigl@transition.com>
0009  *
0010  *  COPYRIGHT (c) 1996 by Transition Networks Inc.
0011  *
0012  *  To anyone who acknowledges that this file is provided "AS IS"
0013  *  without any express or implied warranty:
0014  *      permission to use, copy, modify, and distribute this file
0015  *      for any purpose is hereby granted without fee, provided that
0016  *      the above copyright notice and this notice appears in all
0017  *      copies, and that the name of Transition Networks not be used in
0018  *      advertising or publicity pertaining to distribution of the
0019  *      software without specific, written prior permission.
0020  *      Transition Networks makes no representations about the suitability
0021  *      of this software for any purpose.
0022  *
0023  *  Derived from c/src/lib/libbsp/no_cpu/no_bsp/clock/ckinit.c
0024  *
0025  *  COPYRIGHT (c) 1989-2012.
0026  *  On-Line Applications Research Corporation (OAR).
0027  *
0028  *  The license and distribution terms for this file may be
0029  *  found in the file LICENSE in this distribution or at
0030  *  http://www.rtems.org/license/LICENSE.
0031  */
0032 
0033 /*
0034  *  Rather than deleting this, it is commented out to (hopefully) help
0035  *  the submitter send updates.
0036  *
0037  *  static char _sccsid[] = "@(#)ckinit.c 08/20/96     1.3\n";
0038  */
0039 
0040 
0041 #include <stdlib.h>
0042 
0043 #include <rtems.h>
0044 #include <bsp.h>
0045 #include <bsp/irq.h>
0046 #include <rtems/clockdrv.h>
0047 
0048 extern uint32_t bsp_clicks_per_microsecond;
0049 
0050 #define EXT_INT1    0x800  /* external interrupt 5 */
0051 
0052 #include "clock.h"
0053 
0054 rtems_isr USC_isr(void *unused);
0055 
0056 void reset_wdt(void);
0057 void enable_wdi(void);
0058 void init_hbt(void);
0059 void enable_hbi(void);
0060 void disable_hbi(void);
0061 
0062 static void Clock_exit(void);
0063 rtems_isr Clock_isr(rtems_vector_number vector);
0064 rtems_isr User_Clock_isr(rtems_vector_number vector);
0065 void Install_clock(rtems_isr_entry clock_isr);
0066 
0067 
0068 /*
0069  *  The interrupt vector number associated with the clock tick device
0070  *  driver.
0071  */
0072 
0073 #define CLOCK_VECTOR_MASK    EXT_INT1
0074 #define CLOCK_VECTOR         MIPS_INTERRUPT_BASE + 0x3
0075 
0076 /*
0077  *  Clock_driver_ticks is a monotonically increasing counter of the
0078  *  number of clock ticks since the driver was initialized.
0079  */
0080 
0081 volatile uint32_t Clock_driver_ticks;
0082 
0083 /*
0084  *  Clock_isrs is the number of clock ISRs until the next invocation of
0085  *  the RTEMS clock tick routine.  The clock tick device driver
0086  *  gets an interrupt once a millisecond and counts down until the
0087  *  length of time between the user configured microseconds per tick
0088  *  has passed.
0089  */
0090 
0091 uint32_t Clock_isrs;              /* ISRs until next tick */
0092 
0093 /*
0094  *  The previous ISR on this clock tick interrupt vector.
0095  */
0096 
0097 rtems_isr_entry  Old_ticker;
0098 
0099 static uint32_t mips_timer_rate = 0;
0100 
0101 /*
0102  *  Isr Handler
0103  */
0104 
0105 rtems_isr Clock_isr(
0106   rtems_vector_number vector
0107 )
0108 {
0109 /*
0110  * bump the number of clock driver ticks since initialization
0111  *
0112  * determine if it is time to announce the passing of tick as configured
0113  * to RTEMS through the rtems_clock_tick directive
0114  *
0115  * perform any timer dependent tasks
0116  */
0117 
0118   reset_wdt();    /* Reset hardware watchdog timer */
0119 
0120   Clock_driver_ticks += 1;
0121 
0122   rtems_clock_tick();
0123 }
0124 
0125 /* User callback shell (set from Clock_Control) */
0126 static void (*user_callback)(void);
0127 
0128 rtems_isr User_Clock_isr(
0129   rtems_vector_number vector
0130 )
0131 {
0132    if (user_callback)
0133       user_callback();
0134 }
0135 
0136 /*
0137  *  Install_clock
0138  *
0139  *  Install a clock tick handleR and reprograms the chip.  This
0140  *  is used to initially establish the clock tick.
0141  */
0142 
0143 void Install_clock(
0144   rtems_isr_entry clock_isr
0145 )
0146 {
0147   /*
0148   *  Initialize the clock tick device driver variables
0149   */
0150 
0151   Clock_driver_ticks = 0;
0152   Clock_isrs = rtems_configuration_get_milliseconds_per_tick();
0153 
0154   mips_timer_rate = rtems_configuration_get_microseconds_per_tick() *
0155            bsp_clicks_per_microsecond;
0156 
0157   /*
0158   *  Hardware specific initialize goes here
0159   */
0160 
0161   /* Set up USC heartbeat timer to generate interrupts */
0162   disable_hbi();      /* Disable heartbeat interrupt in USC */
0163 
0164   /* Install interrupt handler */
0165   rtems_interrupt_handler_install( 
0166     CLOCK_VECTOR,
0167     "clock",
0168     0,
0169     USC_isr,
0170     NULL
0171   );
0172 
0173   init_hbt();        /* Initialize heartbeat timer */
0174 
0175   reset_wdt();      /* Reset watchdog timer */
0176 
0177   enable_wdi();      /* Enable watchdog interrupt in USC */
0178 
0179   enable_hbi();      /* Enable heartbeat interrupt in USC */
0180 
0181               /* Enable USC interrupt in MIPS processor */
0182   mips_enable_in_interrupt_mask(CLOCK_VECTOR_MASK);
0183 
0184   /*
0185   *  Schedule the clock cleanup routine to execute if the application exits.
0186   */
0187 
0188   atexit( Clock_exit );
0189 }
0190 
0191 /*
0192  *  Clean up before the application exits
0193  */
0194 
0195 void Clock_exit( void )
0196 {
0197   /* mips: turn off the timer interrupts */
0198   mips_disable_in_interrupt_mask(~CLOCK_VECTOR_MASK);
0199 }
0200 
0201 void _Clock_Initialize( void )
0202 {
0203   Install_clock( Clock_isr );
0204 }