csb350/clock/clockdrv.c

0001 /**
0002  *  @file
0003  *
0004  *  Instantiate the clock driver shell.
0005  *
0006  *  This uses the TOY (Time of Year) timer to implement the clock.
0007  */
0008
0009 /*
0010  *  Copyright (c) 2005 by Cogent Computer Systems
0011  *  Written by Jay Monkman <jtm@lopingdog.com>
0012  *
0013  *  The license and distribution terms for this file may be
0014  *  found in the file LICENSE in this distribution or at
0015  *  http://www.rtems.org/license/LICENSE.
0016  */
0017
0018 #include <rtems.h>
0019 #include <bsp.h>
0020 #include <bsp/irq.h>
0021 #include <rtems/bspIo.h>
0022
0023 uint32_t tick_interval;
0024 uint32_t last_match;
0025
0026 void au1x00_clock_init(void);
0027
0028 #define CLOCK_VECTOR AU1X00_IRQ_TOY_MATCH2
0029
0030 #define Clock_driver_support_at_tick(arg) \
0031   do { \
0032     while (AU1X00_SYS_CNTCTRL(AU1X00_SYS_ADDR) & AU1X00_SYS_CNTCTRL_TM0); \
0033     last_match = AU1X00_SYS_TOYREAD(AU1X00_SYS_ADDR); \
0034     AU1X00_SYS_TOYMATCH2(AU1X00_SYS_ADDR) = last_match + tick_interval; \
0035     au_sync(); \
0036   } while(0)
0037
0038 /* Set for rising edge interrupt */
0039 #define Clock_driver_support_install_isr( _new ) \
0040   do { \
0041     rtems_interrupt_handler_install( \
0042       CLOCK_VECTOR, \
0043       "clock", \
0044       0, \
0045       _new, \
0046       NULL \
0047     ); \
0048     AU1X00_IC_MASKCLR(AU1X00_IC0_ADDR) = AU1X00_IC_IRQ_TOY_MATCH2; \
0049     AU1X00_IC_SRCSET(AU1X00_IC0_ADDR) = AU1X00_IC_IRQ_TOY_MATCH2; \
0050     AU1X00_IC_CFG0SET(AU1X00_IC0_ADDR) = AU1X00_IC_IRQ_TOY_MATCH2; \
0051     AU1X00_IC_CFG1CLR(AU1X00_IC0_ADDR) = AU1X00_IC_IRQ_TOY_MATCH2; \
0052     AU1X00_IC_CFG2CLR(AU1X00_IC0_ADDR) = AU1X00_IC_IRQ_TOY_MATCH2; \
0053     AU1X00_IC_ASSIGNSET(AU1X00_IC0_ADDR) = AU1X00_IC_IRQ_TOY_MATCH2; \
0054   } while(0)
0055
0056 void au1x00_clock_init(void)
0057 {
0058     uint32_t wakemask;
0059     /* Clear the trim register */
0060     AU1X00_SYS_TOYTRIM(AU1X00_SYS_ADDR) = 0;
0061
0062     /* Clear the TOY counter */
0063     while (AU1X00_SYS_CNTCTRL(AU1X00_SYS_ADDR) & AU1X00_SYS_CNTCTRL_TS);
0064     AU1X00_SYS_TOYWRITE(AU1X00_SYS_ADDR) = 0;
0065     while (AU1X00_SYS_CNTCTRL(AU1X00_SYS_ADDR) & AU1X00_SYS_CNTCTRL_TS);
0066
0067     wakemask = AU1X00_SYS_WAKEMSK(AU1X00_SYS_ADDR);
0068     wakemask |= AU1X00_SYS_WAKEMSK_M20;
0069     AU1X00_SYS_WAKEMSK(AU1X00_SYS_ADDR) = wakemask;
0070     AU1X00_IC_WAKESET(AU1X00_IC0_ADDR) = AU1X00_IC_IRQ_TOY_MATCH2;
0071
0072     tick_interval = 32768 * rtems_configuration_get_microseconds_per_tick();
0073     tick_interval = tick_interval / 1000000;
0074
0075     last_match = AU1X00_SYS_TOYREAD(AU1X00_SYS_ADDR);
0076     AU1X00_SYS_TOYMATCH2(AU1X00_SYS_ADDR) = last_match + (50*tick_interval);
0077     AU1X00_IC_MASKSET(AU1X00_IC0_ADDR) = AU1X00_IC_IRQ_TOY_MATCH2;
0078     while (AU1X00_SYS_CNTCTRL(AU1X00_SYS_ADDR) & AU1X00_SYS_CNTCTRL_TM0);
0079 }
0080
0081 #define Clock_driver_support_initialize_hardware() \
0082   do {                                                  \
0083      au1x00_clock_init(); \
0084   } while(0)
0085
0086 #define CLOCK_DRIVER_USE_DUMMY_TIMECOUNTER
0087
0088 #include "../../../shared/dev/clock/clockimpl.h"