microblaze_fpga/start/crtinit.S

0001 /* SPDX-License-Identifier: BSD-3-Clause */
0002
0003 /* Copyright (c) 2001, 2009 Xilinx, Inc.  All rights reserved.
0004
0005    Redistribution and use in source and binary forms, with or without
0006    modification, are permitted provided that the following conditions are
0007    met:
0008
0009    1.  Redistributions source code must retain the above copyright notice,
0010    this list of conditions and the following disclaimer.
0011
0012    2.  Redistributions in binary form must reproduce the above copyright
0013    notice, this list of conditions and the following disclaimer in the
0014    documentation and/or other materials provided with the distribution.
0015
0016    3.  Neither the name of Xilinx nor the names of its contributors may be
0017    used to endorse or promote products derived from this software without
0018    specific prior written permission.
0019
0020    THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDER AND CONTRIBUTORS "AS
0021    IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
0022    TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A
0023    PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
0024    HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
0025    SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
0026    TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
0027    PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
0028    LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
0029    NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
0030    SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
0031  */
0032
0033 #include <bspopts.h>
0034
0035     .globl _crtinit
0036     .align 2
0037     .ent _crtinit
0038     .type _crtinit, @function
0039 _crtinit:
0040     addi    r1, r1, -20             /* Save Link register    */
0041     swi r15, r1, 0
0042
0043 #ifndef __rtems__
0044     addi    r6, r0, __sbss_start            /* clear SBSS */
0045     addi    r7, r0, __sbss_end
0046     rsub    r18, r6, r7
0047     blei    r18, .Lendsbss
0048
0049 .Lloopsbss:
0050     swi r0, r6, 0
0051     addi    r6, r6, 4
0052     rsub    r18, r6, r7
0053     bgti    r18, .Lloopsbss
0054 .Lendsbss:
0055 #endif /* __rtems__ */
0056
0057 #ifndef __rtems__
0058     addi    r6, r0, __bss_start          /* clear BSS */
0059     addi    r7, r0, __bss_end
0060 #else
0061     addi  r6, r0, bsp_section_bss_begin
0062     addi  r7, r0, bsp_section_bss_end
0063 #endif  /* __rtems__ */
0064     rsub    r18, r6, r7
0065     blei    r18, .Lendbss
0066 .Lloopbss:
0067     swi r0, r6, 0
0068     addi    r6, r6, 4
0069     rsub    r18, r6, r7
0070     bgti    r18, .Lloopbss
0071 .Lendbss:
0072
0073 #ifndef __rtems__
0074     brlid   r15, _program_init           /* Initialize the program  */
0075     nop
0076
0077     brlid   r15, __init                  /* Invoke language initialization functions */
0078     nop
0079 #endif /* __rtems__ */
0080 #ifdef BSP_START_COPY_FDT_FROM_U_BOOT      /* Boot loaders may pass the device tree in r5 */
0081     brlid   r15, bsp_fdt_copy              /* Do not touch r5 until bsp_fdt_copy() is called */
0082 #endif /* BSP_START_COPY_FDT_FROM_U_BOOT */
0083     addi    r6, r0, 0                      /* Initialize argc = 1 and argv = NULL and envp = NULL  */
0084     addi    r7, r0, 0
0085 #ifndef __rtems__
0086     brlid   r15, main                      /* Execute the program */
0087 #else
0088     mfs r3, rmsr
0089     ori r3, r3, 0x100                      /* Set Exception Enable MSR flag */
0090     mts rmsr, r3
0091     brlid   r15, boot_card
0092 #endif /* __rtems__ */
0093     addi    r5, r0, 0
0094
0095     addik   r19, r3, 0                    /* Save return value */
0096
0097 #ifndef __rtems__
0098     brlid   r15, __fini                  /* Invoke language cleanup functions */
0099     nop
0100
0101     brlid   r15, _program_clean          /* Cleanup the program  */
0102     nop
0103 #endif /* __rtems__ */
0104
0105     lw r15, r1, r0                   /* Return back to CRT   */
0106
0107     addik r3, r19, 0                      /* Restore return value */
0108     rtsd r15, 8
0109     addi r1, r1, 20
0110     .end _crtinit