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File indexing completed on 2025-05-11 08:23:49

0001 /* SPDX-License-Identifier: BSD-3-Clause */
0002 
0003 /* Copyright (c) 2001, 2009 Xilinx, Inc.  All rights reserved.
0004 
0005    Redistribution and use in source and binary forms, with or without
0006    modification, are permitted provided that the following conditions are
0007    met:
0008 
0009    1.  Redistributions source code must retain the above copyright notice,
0010    this list of conditions and the following disclaimer.
0011 
0012    2.  Redistributions in binary form must reproduce the above copyright
0013    notice, this list of conditions and the following disclaimer in the
0014    documentation and/or other materials provided with the distribution.
0015 
0016    3.  Neither the name of Xilinx nor the names of its contributors may be
0017    used to endorse or promote products derived from this software without
0018    specific prior written permission.
0019 
0020    THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDER AND CONTRIBUTORS "AS
0021    IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
0022    TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A
0023    PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
0024    HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
0025    SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
0026    TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
0027    PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
0028    LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
0029    NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
0030    SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
0031 
0032 */
0033 
0034 #include <rtems/score/cpuimpl.h>
0035 
0036     .text
0037     .globl _interrupt_handler    # Interrupt Handler Label
0038     .align 2
0039 
0040     _interrupt_handler:
0041 #ifndef __rtems__
0042     rtid    r14, 0
0043     nop
0044 #else /* __rtems__ */
0045     /* Subtract stack frame */
0046     addik r1, r1, -(CPU_INTERRUPT_FRAME_SIZE)
0047 
0048     /* Save stack frame */
0049     swi  r3, r1, MICROBLAZE_INTERRUPT_FRAME_R3
0050     swi  r4, r1, MICROBLAZE_INTERRUPT_FRAME_R4
0051     swi  r5, r1, MICROBLAZE_INTERRUPT_FRAME_R5
0052     swi  r6, r1, MICROBLAZE_INTERRUPT_FRAME_R6
0053     swi  r7, r1, MICROBLAZE_INTERRUPT_FRAME_R7
0054     swi  r8, r1, MICROBLAZE_INTERRUPT_FRAME_R8
0055     swi  r9, r1, MICROBLAZE_INTERRUPT_FRAME_R9
0056     swi r10, r1, MICROBLAZE_INTERRUPT_FRAME_R10
0057     swi r11, r1, MICROBLAZE_INTERRUPT_FRAME_R11
0058     swi r12, r1, MICROBLAZE_INTERRUPT_FRAME_R12
0059     swi r14, r1, MICROBLAZE_INTERRUPT_FRAME_R14
0060     swi r15, r1, MICROBLAZE_INTERRUPT_FRAME_R15
0061     swi r18, r1, MICROBLAZE_INTERRUPT_FRAME_R18
0062     mfs r3, rmsr
0063     swi  r3, r1, MICROBLAZE_INTERRUPT_FRAME_MSR
0064 
0065     /* Indicate unknown interrupt source */
0066     braid _ISR_Handler
0067     addik r5, r0, 0xFF
0068 #endif /* __rtems__ */