microblaze_fpga/start/_debug_sw_break_handler.S

0001 /* SPDX-License-Identifier: BSD-2-Clause */
0002
0003 /**
0004  * @file
0005  *
0006  * @ingroup RTEMSBSPsMicroBlaze
0007  *
0008  * @brief MicroBlaze debug trap handler implementation
0009  */
0010
0011 /*
0012  * Copyright (C) 2022 On-Line Applications Research Corporation (OAR)
0013  *
0014  * Redistribution and use in source and binary forms, with or without
0015  * modification, are permitted provided that the following conditions
0016  * are met:
0017  * 1. Redistributions of source code must retain the above copyright
0018  *    notice, this list of conditions and the following disclaimer.
0019  * 2. Redistributions in binary form must reproduce the above copyright
0020  *    notice, this list of conditions and the following disclaimer in the
0021  *    documentation and/or other materials provided with the distribution.
0022  *
0023  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
0024  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
0025  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
0026  * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
0027  * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
0028  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
0029  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
0030  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
0031  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
0032  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
0033  * POSSIBILITY OF SUCH DAMAGE.
0034  */
0035
0036 #include <rtems/score/cpu.h>
0037
0038     .text
0039     .globl _debug_sw_break_handler    # HW Exception Handler Label
0040     .extern _MicroBlaze_Debug_handle
0041     .align 2
0042
0043     _debug_sw_break_handler:
0044     /* The stack used here does not matter since debug cannot recurse */
0045
0046     /* Subtract exception frame */
0047     addik r1, r1, -(CPU_EXCEPTION_FRAME_SIZE)
0048
0049     /* Store program state */
0050     swi  r2, r1, MICROBLAZE_EXCEPTION_FRAME_R2
0051     swi  r3, r1, MICROBLAZE_EXCEPTION_FRAME_R3
0052     swi  r4, r1, MICROBLAZE_EXCEPTION_FRAME_R4
0053     swi  r5, r1, MICROBLAZE_EXCEPTION_FRAME_R5
0054     swi  r6, r1, MICROBLAZE_EXCEPTION_FRAME_R6
0055     swi  r7, r1, MICROBLAZE_EXCEPTION_FRAME_R7
0056     swi  r8, r1, MICROBLAZE_EXCEPTION_FRAME_R8
0057     swi  r9, r1, MICROBLAZE_EXCEPTION_FRAME_R9
0058     swi r10, r1, MICROBLAZE_EXCEPTION_FRAME_R10
0059     swi r11, r1, MICROBLAZE_EXCEPTION_FRAME_R11
0060     swi r12, r1, MICROBLAZE_EXCEPTION_FRAME_R12
0061     swi r13, r1, MICROBLAZE_EXCEPTION_FRAME_R13
0062     swi r14, r1, MICROBLAZE_EXCEPTION_FRAME_R14
0063     swi r15, r1, MICROBLAZE_EXCEPTION_FRAME_R15
0064     swi r16, r1, MICROBLAZE_EXCEPTION_FRAME_R16
0065     swi r17, r1, MICROBLAZE_EXCEPTION_FRAME_R17
0066     swi r18, r1, MICROBLAZE_EXCEPTION_FRAME_R18
0067     swi r19, r1, MICROBLAZE_EXCEPTION_FRAME_R19
0068     swi r20, r1, MICROBLAZE_EXCEPTION_FRAME_R20
0069     swi r21, r1, MICROBLAZE_EXCEPTION_FRAME_R21
0070     swi r22, r1, MICROBLAZE_EXCEPTION_FRAME_R22
0071     swi r23, r1, MICROBLAZE_EXCEPTION_FRAME_R23
0072     swi r24, r1, MICROBLAZE_EXCEPTION_FRAME_R24
0073     swi r25, r1, MICROBLAZE_EXCEPTION_FRAME_R25
0074     swi r26, r1, MICROBLAZE_EXCEPTION_FRAME_R26
0075     swi r27, r1, MICROBLAZE_EXCEPTION_FRAME_R27
0076     swi r28, r1, MICROBLAZE_EXCEPTION_FRAME_R28
0077     swi r29, r1, MICROBLAZE_EXCEPTION_FRAME_R29
0078     swi r30, r1, MICROBLAZE_EXCEPTION_FRAME_R30
0079     swi r31, r1, MICROBLAZE_EXCEPTION_FRAME_R31
0080
0081     /* Retrieve and store MSR */
0082     mfs r3, rmsr
0083     swi r3, r1, MICROBLAZE_EXCEPTION_FRAME_MSR
0084
0085     /* Retrieve and store EAR */
0086     mfs r3, rear
0087     swi r3, r1, MICROBLAZE_EXCEPTION_FRAME_EAR
0088
0089     /* Retrieve and store ESR */
0090     mfs r3, resr
0091     swi r3, r1, MICROBLAZE_EXCEPTION_FRAME_ESR
0092
0093     /* Retrieve and store BTR */
0094     mfs r3, rbtr
0095     swi r3, r1, MICROBLAZE_EXCEPTION_FRAME_BTR
0096
0097     /* Calculate and store original stack pointer */
0098     addik r3, r1, CPU_EXCEPTION_FRAME_SIZE
0099     swi r3, r1, MICROBLAZE_EXCEPTION_FRAME_R1
0100
0101     /* set parameter 1 to CPU Exception frame */
0102     addi r5, r1, 0
0103
0104     /* call into the debug framework */
0105     braid _MicroBlaze_Debug_handle
0106     nop