include/bsp/timer.h

0001 /* SPDX-License-Identifier: BSD-2-Clause */
0002
0003 /**
0004  * @file
0005  *
0006  * @ingroup RTEMSBSPsMicroblaze
0007  *
0008  * @brief MicroBlaze AXI Timer definitions
0009  */
0010
0011 /*
0012  * Copyright (C) 2021 On-Line Applications Research Corporation (OAR)
0013  *
0014  * Redistribution and use in source and binary forms, with or without
0015  * modification, are permitted provided that the following conditions
0016  * are met:
0017  * 1. Redistributions of source code must retain the above copyright
0018  *    notice, this list of conditions and the following disclaimer.
0019  * 2. Redistributions in binary form must reproduce the above copyright
0020  *    notice, this list of conditions and the following disclaimer in the
0021  *    documentation and/or other materials provided with the distribution.
0022  *
0023  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
0024  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
0025  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
0026  * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
0027  * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
0028  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
0029  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
0030  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
0031  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
0032  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
0033  * POSSIBILITY OF SUCH DAMAGE.
0034  */
0035
0036 #ifndef LIBBSP_MICROBLAZE_FPGA_TIMER_H
0037 #define LIBBSP_MICROBLAZE_FPGA_TIMER_H
0038
0039 #include <bspopts.h>
0040
0041 #include <bsp/utility.h>
0042
0043 #ifdef __cplusplus
0044 extern "C" {
0045 #endif /* __cplusplus */
0046
0047 typedef struct {
0048 #define MICROBLAZE_TIMER_TCSR0_T0INT BSP_BIT32(8)
0049 #define MICROBLAZE_TIMER_TCSR0_ENT0 BSP_BIT32(7)
0050 #define MICROBLAZE_TIMER_TCSR0_ENIT0 BSP_BIT32(6)
0051 #define MICROBLAZE_TIMER_TCSR0_LOAD0 BSP_BIT32(5)
0052 #define MICROBLAZE_TIMER_TCSR0_ARHT0 BSP_BIT32(4)
0053 #define MICROBLAZE_TIMER_TCSR0_GENT0 BSP_BIT32(2)
0054 #define MICROBLAZE_TIMER_TCSR0_UDT0 BSP_BIT32(1)
0055   /* Control/Status register */
0056   uint32_t tcsr0;
0057   /* Load register */
0058   uint32_t tlr0;
0059   /* Timer counter register */
0060   uint32_t tcr0;
0061 } Microblaze_Timer;
0062
0063 #ifdef __cplusplus
0064 }
0065 #endif /* __cplusplus */
0066
0067 #endif /* LIBBSP_MICROBLAZE_FPGA_TIMER_H */