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0001 /* SPDX-License-Identifier: BSD-2-Clause */
0002 
0003 /*
0004  *  uC5282 startup code
0005  *
0006  *  This file contains the entry point for the application.
0007  *  The name of this entry point is compiler dependent.
0008  *  It jumps to the BSP which is responsible for performing
0009  *  all initialization.
0010  *
0011  *  COPYRIGHT (c) 1989-1998.
0012  *  On-Line Applications Research Corporation (OAR).
0013  *
0014  * Redistribution and use in source and binary forms, with or without
0015  * modification, are permitted provided that the following conditions
0016  * are met:
0017  * 1. Redistributions of source code must retain the above copyright
0018  *    notice, this list of conditions and the following disclaimer.
0019  * 2. Redistributions in binary form must reproduce the above copyright
0020  *    notice, this list of conditions and the following disclaimer in the
0021  *    documentation and/or other materials provided with the distribution.
0022  *
0023  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
0024  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
0025  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
0026  * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
0027  * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
0028  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
0029  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
0030  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
0031  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
0032  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
0033  * POSSIBILITY OF SUCH DAMAGE.
0034  */
0035 
0036 #include <rtems/asm.h>
0037 
0038 #define SRAM_SIZE (64*1024)
0039 #define DEFAULT_IPSBAR  0x40000000
0040 
0041 BEGIN_CODE
0042 
0043 /***************************************************************************
0044    Function : Entry
0045 
0046    Description : Entry point to the system. In a raw system we would have
0047    put the initial stack pointer as the first 4 bytes.  Instead we have to
0048    provide a real instruction at the first location since we might be getting
0049    started by dBUG after downloading from TFTP or FLASH.   Hack in an
0050    'initial stack pointer' that actually is a jump to the start address!
0051  ***************************************************************************/
0052 Entry:
0053 
0054 
0055     nop ; jmp SYM(start)    |   0: Initial 'SSP'    1: Initial PC
0056     .long   SYM(_uhoh)      |   2: Bus error
0057     .long   SYM(_uhoh)      |   3: Address error
0058     .long   SYM(_uhoh)      |   4: Illegal instruction
0059     .long   SYM(_uhoh)      |   5: Zero division
0060     .long   SYM(_uhoh)      |   6: CHK, CHK2 instruction
0061     .long   SYM(_uhoh)      |   7: TRAPcc, TRAPV instructions
0062     .long   SYM(_uhoh)      |   8: Privilege violation
0063     .long   SYM(_uhoh)      |   9: Trace
0064     .long   SYM(_uhoh)      |  10: Line 1010 emulator
0065     .long   SYM(_uhoh)      |  11: Line 1111 emulator
0066     .long   SYM(_uhoh)      |  12: Hardware breakpoint
0067     .long   SYM(_uhoh)      |  13: Reserved for coprocessor violation
0068     .long   SYM(_uhoh)      |  14: Format error
0069     .long   SYM(_uhoh)      |  15: Uninitialized interrupt
0070     .long   SYM(_uhoh)      |  16: Unassigned, reserved
0071     .long   SYM(_uhoh)      |  17:
0072     .long   SYM(_uhoh)      |  18:
0073     .long   SYM(_uhoh)      |  19:
0074     .long   SYM(_uhoh)      |  20:
0075     .long   SYM(_uhoh)      |  21:
0076     .long   SYM(_uhoh)      |  22:
0077     .long   SYM(_uhoh)      |  23:
0078     .long   SYM(_spuriousInterrupt) |  24: Spurious interrupt
0079     .long   SYM(_uhoh)      |  25: Level 1 interrupt autovector
0080     .long   SYM(_uhoh)      |  26: Level 2 interrupt autovector
0081     .long   SYM(_uhoh)      |  27: Level 3 interrupt autovector
0082     .long   SYM(_uhoh)      |  28: Level 4 interrupt autovector
0083     .long   SYM(_uhoh)      |  29: Level 5 interrupt autovector
0084     .long   SYM(_uhoh)      |  30: Level 6 interrupt autovector
0085     .long   SYM(_uhoh)      |  31: Level 7 interrupt autovector
0086     .long   SYM(_uhoh)      |  32: Trap instruction (0-15)
0087     .long   SYM(_uhoh)      |  33:
0088     .long   SYM(_uhoh)      |  34:
0089     .long   SYM(_uhoh)      |  35:
0090     .long   SYM(_uhoh)      |  36:
0091     .long   SYM(_uhoh)      |  37:
0092     .long   SYM(_uhoh)      |  38:
0093     .long   SYM(_uhoh)      |  39:
0094     .long   SYM(_uhoh)      |  40:
0095     .long   SYM(_uhoh)      |  41:
0096     .long   SYM(_uhoh)      |  42:
0097     .long   SYM(_uhoh)      |  43:
0098     .long   SYM(_uhoh)      |  44:
0099     .long   SYM(_uhoh)      |  45:
0100     .long   SYM(_uhoh)      |  46:
0101     .long   SYM(_uhoh)      |  47:
0102     .long   SYM(_uhoh)      |  48: Reserved for coprocessor
0103     .long   SYM(_uhoh)      |  49:
0104     .long   SYM(_uhoh)      |  50:
0105     .long   SYM(_uhoh)      |  51:
0106     .long   SYM(_uhoh)      |  52:
0107     .long   SYM(_uhoh)      |  53:
0108     .long   SYM(_uhoh)      |  54:
0109     .long   SYM(_uhoh)      |  55:
0110     .long   SYM(_uhoh)      |  56:
0111     .long   SYM(_uhoh)      |  57:
0112     .long   SYM(_uhoh)      |  58:
0113     .long   SYM(_uhoh)      |  59: Unassigned, reserved
0114     .long   SYM(_uhoh)      |  60:
0115     .long   SYM(_uhoh)      |  61:
0116     .long   SYM(_uhoh)      |  62:
0117     .long   SYM(_uhoh)      |  63:
0118     .long   SYM(_spuriousInterrupt) |  64: User spurious handler
0119     .long   SYM(_uhoh)      |  65:
0120     .long   SYM(_uhoh)      |  66:
0121     .long   SYM(_uhoh)      |  67:
0122     .long   SYM(_uhoh)      |  68:
0123     .long   SYM(_uhoh)      |  69:
0124     .long   SYM(_uhoh)      |  70:
0125     .long   SYM(_uhoh)      |  71:
0126     .long   SYM(_uhoh)      |  72:
0127     .long   SYM(_uhoh)      |  73:
0128     .long   SYM(_uhoh)      |  74:
0129     .long   SYM(_uhoh)      |  75:
0130     .long   SYM(_uhoh)      |  76:
0131     .long   SYM(_uhoh)      |  77:
0132     .long   SYM(_uhoh)      |  78:
0133     .long   SYM(_uhoh)      |  79:
0134     .long   SYM(_uhoh)      |  80:
0135     .long   SYM(_uhoh)      |  81:
0136     .long   SYM(_uhoh)      |  82:
0137     .long   SYM(_uhoh)      |  83:
0138     .long   SYM(_uhoh)      |  84:
0139     .long   SYM(_uhoh)      |  85:
0140     .long   SYM(_uhoh)      |  86:
0141     .long   SYM(_uhoh)      |  87:
0142     .long   SYM(_uhoh)      |  88:
0143     .long   SYM(_uhoh)      |  89:
0144     .long   SYM(_uhoh)      |  90:
0145     .long   SYM(_uhoh)      |  91:
0146     .long   SYM(_uhoh)      |  92:
0147     .long   SYM(_uhoh)      |  93:
0148     .long   SYM(_uhoh)      |  94:
0149     .long   SYM(_uhoh)      |  95:
0150     .long   SYM(_uhoh)      |  96:
0151     .long   SYM(_uhoh)      |  97:
0152     .long   SYM(_uhoh)      |  98:
0153     .long   SYM(_uhoh)      |  99:
0154     .long   SYM(_uhoh)      | 100:
0155     .long   SYM(_uhoh)      | 101:
0156     .long   SYM(_uhoh)      | 102:
0157     .long   SYM(_uhoh)      | 103:
0158     .long   SYM(_uhoh)      | 104:
0159     .long   SYM(_uhoh)      | 105:
0160     .long   SYM(_uhoh)      | 106:
0161     .long   SYM(_uhoh)      | 107:
0162     .long   SYM(_uhoh)      | 108:
0163     .long   SYM(_uhoh)      | 109:
0164     .long   SYM(_uhoh)      | 110:
0165     .long   SYM(_uhoh)      | 111:
0166     .long   SYM(_uhoh)      | 112:
0167     .long   SYM(_uhoh)      | 113:
0168     .long   SYM(_uhoh)      | 114:
0169     .long   SYM(_uhoh)      | 115:
0170     .long   SYM(_uhoh)      | 116:
0171     .long   SYM(_uhoh)      | 117:
0172     .long   SYM(_uhoh)      | 118:
0173     .long   SYM(_uhoh)      | 119:
0174     .long   SYM(_uhoh)      | 120:
0175     .long   SYM(_uhoh)      | 121:
0176     .long   SYM(_uhoh)      | 122:
0177     .long   SYM(_uhoh)      | 123:
0178     .long   SYM(_uhoh)      | 124:
0179     .long   SYM(_uhoh)      | 125:
0180     .long   SYM(_uhoh)      | 126:
0181     .long   SYM(_uhoh)      | 127:
0182     .long   SYM(_uhoh)      | 128:
0183     .long   SYM(_uhoh)      | 129:
0184     .long   SYM(_uhoh)      | 130:
0185     .long   SYM(_uhoh)      | 131:
0186     .long   SYM(_uhoh)      | 132:
0187     .long   SYM(_uhoh)      | 133:
0188     .long   SYM(_uhoh)      | 134:
0189     .long   SYM(_uhoh)      | 135:
0190     .long   SYM(_uhoh)      | 136:
0191     .long   SYM(_uhoh)      | 137:
0192     .long   SYM(_uhoh)      | 138:
0193     .long   SYM(_uhoh)      | 139:
0194     .long   SYM(_uhoh)      | 140:
0195     .long   SYM(_uhoh)      | 141:
0196     .long   SYM(_uhoh)      | 142:
0197     .long   SYM(_uhoh)      | 143:
0198     .long   SYM(_uhoh)      | 144:
0199     .long   SYM(_uhoh)      | 145:
0200     .long   SYM(_uhoh)      | 146:
0201     .long   SYM(_uhoh)      | 147:
0202     .long   SYM(_uhoh)      | 148:
0203     .long   SYM(_uhoh)      | 149:
0204     .long   SYM(_uhoh)      | 150:
0205     .long   SYM(_uhoh)      | 151:
0206     .long   SYM(_uhoh)      | 152:
0207     .long   SYM(_uhoh)      | 153:
0208     .long   SYM(_uhoh)      | 154:
0209     .long   SYM(_uhoh)      | 155:
0210     .long   SYM(_uhoh)      | 156:
0211     .long   SYM(_uhoh)      | 157:
0212     .long   SYM(_uhoh)      | 158:
0213     .long   SYM(_uhoh)      | 159:
0214     .long   SYM(_uhoh)      | 160:
0215     .long   SYM(_uhoh)      | 161:
0216     .long   SYM(_uhoh)      | 162:
0217     .long   SYM(_uhoh)      | 163:
0218     .long   SYM(_uhoh)      | 164:
0219     .long   SYM(_uhoh)      | 165:
0220     .long   SYM(_uhoh)      | 166:
0221     .long   SYM(_uhoh)      | 167:
0222     .long   SYM(_uhoh)      | 168:
0223     .long   SYM(_uhoh)      | 169:
0224     .long   SYM(_uhoh)      | 170:
0225     .long   SYM(_uhoh)      | 171:
0226     .long   SYM(_uhoh)      | 172:
0227     .long   SYM(_uhoh)      | 173:
0228     .long   SYM(_uhoh)      | 174:
0229     .long   SYM(_uhoh)      | 175:
0230     .long   SYM(_uhoh)      | 176:
0231     .long   SYM(_uhoh)      | 177:
0232     .long   SYM(_uhoh)      | 178:
0233     .long   SYM(_uhoh)      | 179:
0234     .long   SYM(_uhoh)      | 180:
0235     .long   SYM(_uhoh)      | 181:
0236     .long   SYM(_uhoh)      | 182:
0237     .long   SYM(_uhoh)      | 183:
0238     .long   SYM(_uhoh)      | 184:
0239     .long   SYM(_uhoh)      | 185:
0240     .long   SYM(_uhoh)      | 186:
0241     .long   SYM(_uhoh)      | 187:
0242     .long   SYM(_uhoh)      | 188:
0243     .long   SYM(_uhoh)      | 189:
0244     .long   SYM(_uhoh)      | 190:
0245     .long   SYM(_uhoh)      | 191:
0246     .long   SYM(_uhoh)      | 192:
0247     .long   SYM(_uhoh)      | 193:
0248     .long   SYM(_uhoh)      | 194:
0249     .long   SYM(_uhoh)      | 195:
0250     .long   SYM(_uhoh)      | 196:
0251     .long   SYM(_uhoh)      | 197:
0252     .long   SYM(_uhoh)      | 198:
0253     .long   SYM(_uhoh)      | 199:
0254     .long   SYM(_uhoh)      | 200:
0255     .long   SYM(_uhoh)      | 201:
0256     .long   SYM(_uhoh)      | 202:
0257     .long   SYM(_uhoh)      | 203:
0258     .long   SYM(_uhoh)      | 204:
0259     .long   SYM(_uhoh)      | 205:
0260     .long   SYM(_uhoh)      | 206:
0261     .long   SYM(_uhoh)      | 207:
0262     .long   SYM(_uhoh)      | 208:
0263     .long   SYM(_uhoh)      | 209:
0264     .long   SYM(_uhoh)      | 210:
0265     .long   SYM(_uhoh)      | 211:
0266     .long   SYM(_uhoh)      | 212:
0267     .long   SYM(_uhoh)      | 213:
0268     .long   SYM(_uhoh)      | 214:
0269     .long   SYM(_uhoh)      | 215:
0270     .long   SYM(_uhoh)      | 216:
0271     .long   SYM(_uhoh)      | 217:
0272     .long   SYM(_uhoh)      | 218:
0273     .long   SYM(_uhoh)      | 219:
0274     .long   SYM(_uhoh)      | 220:
0275     .long   SYM(_uhoh)      | 221:
0276     .long   SYM(_uhoh)      | 222:
0277     .long   SYM(_uhoh)      | 223:
0278     .long   SYM(_uhoh)      | 224:
0279     .long   SYM(_uhoh)      | 225:
0280     .long   SYM(_uhoh)      | 226:
0281     .long   SYM(_uhoh)      | 227:
0282     .long   SYM(_uhoh)      | 228:
0283     .long   SYM(_uhoh)      | 229:
0284     .long   SYM(_uhoh)      | 230:
0285     .long   SYM(_uhoh)      | 231:
0286     .long   SYM(_uhoh)      | 232:
0287     .long   SYM(_uhoh)      | 233:
0288     .long   SYM(_uhoh)      | 234:
0289     .long   SYM(_uhoh)      | 235:
0290     .long   SYM(_uhoh)      | 236:
0291     .long   SYM(_uhoh)      | 237:
0292     .long   SYM(_uhoh)      | 238:
0293     .long   SYM(_uhoh)      | 239:
0294     .long   SYM(_uhoh)      | 240:
0295     .long   SYM(_uhoh)      | 241:
0296     .long   SYM(_uhoh)      | 242:
0297     .long   SYM(_uhoh)      | 243:
0298     .long   SYM(_uhoh)      | 244:
0299     .long   SYM(_uhoh)      | 245:
0300     .long   SYM(_uhoh)      | 246:
0301     .long   SYM(_uhoh)      | 247:
0302     .long   SYM(_uhoh)      | 248:
0303     .long   SYM(_uhoh)      | 249:
0304     .long   SYM(_uhoh)      | 250:
0305     .long   SYM(_uhoh)      | 251:
0306     .long   SYM(_uhoh)      | 252:
0307     .long   SYM(_uhoh)      | 253:
0308     .long   SYM(_uhoh)      | 254:
0309     .long   SYM(_uhoh)      | 255:
0310 
0311 /*
0312  * Default trap handler
0313  * With an oscilloscope you can see AS* stop
0314  */
0315 .align 4
0316     PUBLIC (_uhoh)
0317 SYM(_uhoh):
0318     nop                 | Leave spot for breakpoint
0319     stop    #0x2700             | Stop with interrupts disabled
0320     bra.w   SYM(_uhoh)          | Stuck forever
0321 
0322 .align 4
0323     PUBLIC (_spuriousInterrupt)
0324 SYM(_spuriousInterrupt):
0325     addql   #1,SYM(_M68kSpuriousInterruptCount)
0326     rte
0327 
0328 .align 4
0329     PUBLIC (start)
0330 SYM(start):
0331     move.w  #0x2700,sr                 | Disable interrupts
0332 
0333     /*
0334      * If we're being started by the debugger, and the debugger has
0335      * moved the IPSBAR, we're doomed........
0336      */
0337     move.l  #__IPSBAR+1,d0             | Enable the MCF5282 internal peripherals
0338     move.l  d0,DEFAULT_IPSBAR
0339     move.l  #__SRAMBASE+0x201,d0       | Enable the MCF5282 internal SRAM
0340     movec   d0,%rambar                 | CPU-space copy of RAMBAR
0341     move.l  d0,DEFAULT_IPSBAR+8        | Memory-space copy of RAMBAR
0342     move.l  #__SRAMBASE+SRAM_SIZE-4,sp | Overwrite the fake stack pointer
0343 
0344     /*
0345      * Copy the vector table to address 0 (VBR must be 0 mod 2^20)
0346      * Leave the dBUG vectors (0-63) alone
0347      */
0348     lea.l  (64*4)+Entry,a0
0349     lea.l  (64*4),a1
0350     move.l #(256-64)-1,d0
0351 vectcpy:
0352     move.l a0@+,a1@+       | Copy the vector table
0353     sub.l  #1,d0
0354     bne.s  vectcpy
0355 
0356     /*
0357      * Remainder of the startup code is handled by C code
0358      */
0359     jmp SYM(Init5282)       | Start C code (which never returns)
0360 
0361 /***************************************************************************
0362    Function : CopyDataClearBSSAndStart
0363 
0364    Description : Copy DATA segment, Copy SRAM segment, clear BSS segment,
0365    start C program. Assume that DATA and BSS sizes are multiples of 4.
0366  ***************************************************************************/
0367 .align 4
0368 
0369     PUBLIC (CopyDataClearBSSAndStart)
0370 SYM(CopyDataClearBSSAndStart):
0371     lea SYM(_data_dest_start),a0        | Get start of DATA in RAM
0372     lea SYM(_data_src_start),a2     | Get start of DATA in ROM
0373         sub.l   #SYM(_header_offset),a2          | Change source by the amount of the header offset
0374     cmpl    a0,a2                   | Are they the same?
0375     beq.s   NODATACOPY              | Yes, no copy necessary
0376     lea SYM(_data_dest_end),a1      | Get end of DATA in RAM
0377     bra.s   DATACOPYLOOPTEST            | Branch into copy loop
0378 DATACOPYLOOP:
0379     movel   a2@+,a0@+               | Copy word from ROM to RAM
0380 DATACOPYLOOPTEST:
0381     cmpl    a1,a0                   | Done?
0382     bcs.s   DATACOPYLOOP                | No, skip
0383 NODATACOPY:
0384 
0385 /* Now, clear BSS */
0386         lea _clear_start,a0     | Get start of BSS
0387     lea _clear_end,a1       | Get end of BSS
0388     clrl    d0          | Value to set
0389     bra.s   ZEROLOOPTEST        | Branch into clear loop
0390 ZEROLOOP:
0391     movel   d0,a0@+         | Clear a word
0392 ZEROLOOPTEST:
0393     cmpl    a1,a0           | Done?
0394     bcs.s   ZEROLOOP        | No, skip
0395 
0396 
0397     /*
0398      * Right : Now we're ready to boot RTEMS
0399      */
0400     move.l  #_ISR_Stack_area_end,sp | Use configuration defined stack
0401     clrl    d0          | Pass in null to all boot_card() params
0402     movel   d0,a7@-         | command line
0403     jsr SYM(boot_card)      | Call C boot_card function to startup RTEMS
0404     movel   a7@+,d0
0405 MULTI_TASK_EXIT:
0406     nop
0407     nop
0408     trap    #14
0409     bra     MULTI_TASK_EXIT
0410 
0411 
0412 END_CODE
0413 
0414         .align 2
0415 BEGIN_DATA_DCL
0416         .align 2
0417     PUBLIC (_M68kSpuriousInterruptCount)
0418 SYM (_M68kSpuriousInterruptCount):
0419     .long   0
0420 END_DATA_DCL
0421 
0422 END
0423
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