uC5282/include/bsp.h

0001 /**
0002  * @file
0003  *
0004  * @ingroup RTEMSBSPsM68kUC5282
0005  *
0006  * @brief Global BSP definitions.
0007  */
0008
0009 /*
0010  * Copyright (c) 2005 Eric Norum <eric@norum.ca>
0011  *
0012  * COPYRIGHT (c) 2005.
0013  * On-Line Applications Research Corporation (OAR).
0014  *
0015  * The license and distribution terms for this file may be
0016  * found in the file LICENSE in this distribution or at
0017  * http://www.rtems.org/license/LICENSE.
0018  */
0019
0020 #ifndef LIBBSP_M68K_UC5282_BSP_H
0021 #define LIBBSP_M68K_UC5282_BSP_H
0022
0023 /**
0024  * @defgroup RTEMSBSPsM68kUC5282 uC5282
0025  *
0026  * @ingroup RTEMSBSPsM68k
0027  *
0028  * @brief uC5282 Board Support Package.
0029  *
0030  * @{
0031  */
0032
0033 #include <bspopts.h>
0034 #include <bsp/default-initial-extension.h>
0035
0036 #include <rtems.h>
0037 #include <rtems/bspIo.h>
0038
0039 #ifdef __cplusplus
0040 extern "C" {
0041 #endif
0042
0043 /***************************************************************************/
0044 /**  BSP Configuration                                                    **/
0045 /*
0046  * Uncomment to use instruction/data cache
0047  * Leave commented to use instruction-only cache
0048  */
0049 #define RTEMS_MCF5282_BSP_ENABLE_DATA_CACHE
0050
0051 /***************************************************************************/
0052 /**  Hardware data structure headers                                      **/
0053 #include <mcf5282/mcf5282.h>   /* internal MCF5282 modules */
0054
0055 /***************************************************************************/
0056 /**  Network driver configuration                                         **/
0057 struct rtems_bsdnet_ifconfig;
0058 extern int rtems_fec_driver_attach (struct rtems_bsdnet_ifconfig *config, int attaching );
0059 #define RTEMS_BSP_NETWORK_DRIVER_NAME     "fs1"
0060 #define RTEMS_BSP_NETWORK_DRIVER_ATTACH   rtems_fec_driver_attach
0061
0062 /***************************************************************************/
0063 /**  User Definable configuration                                         **/
0064
0065 /* define which port the console should use - all other ports are then defined as general purpose */
0066 #define CONSOLE_PORT        0
0067
0068 /* functions */
0069
0070 typedef struct {
0071     unsigned int l;
0072     void        *v;
0073 } bsp_mnode_t;
0074
0075 #define RTEMS_BSP_PGM_ERASE_FIRST   0x1
0076 #define RTEMS_BSP_PGM_RESET_AFTER   0x2
0077 #define RTEMS_BSP_PGM_EXEC_AFTER    0x4
0078 #define RTEMS_BSP_PGM_HALT_AFTER    0x8
0079
0080 uint32_t bsp_get_CPU_clock_speed(void);
0081 rtems_status_code bsp_allocate_interrupt(int level, int priority);
0082 int bsp_sysReset(int flags);
0083 int bsp_program(bsp_mnode_t *chain, int flags);
0084 unsigned const char *bsp_gethwaddr(int a);
0085 const char *bsp_getbenv(const char *a);
0086 int bsp_flash_erase_range(volatile unsigned short *flashptr, int start, int end);
0087 int bsp_flash_write_range(volatile unsigned short *flashptr, bsp_mnode_t *chain, int offset);
0088
0089 rtems_isr_entry set_vector(
0090   rtems_isr_entry     handler,
0091   rtems_vector_number vector,
0092   int                 type
0093 );
0094
0095 /*
0096  * Interrupt assignments
0097  *  Highest-priority listed first
0098  */
0099 #define FEC_IRQ_LEVEL       4
0100 #define FEC_IRQ_RX_PRIORITY 7
0101 #define FEC_IRQ_TX_PRIORITY 6
0102
0103 #define PIT3_IRQ_LEVEL      4
0104 #define PIT3_IRQ_PRIORITY   0
0105
0106 #define UART0_IRQ_LEVEL     3
0107 #define UART0_IRQ_PRIORITY  7
0108 #define UART1_IRQ_LEVEL     3
0109 #define UART1_IRQ_PRIORITY  6
0110 #define UART2_IRQ_LEVEL     3
0111 #define UART2_IRQ_PRIORITY  5
0112
0113 /*
0114  * Fake VME support
0115  * This makes it easier to use EPICS driver support on this BSP.
0116  */
0117 #define VME_AM_STD_SUP_ASCENDING   0x3f
0118 #define VME_AM_STD_SUP_PGM         0x3e
0119 #define VME_AM_STD_USR_ASCENDING   0x3b
0120 #define VME_AM_STD_USR_PGM         0x3a
0121 #define VME_AM_STD_SUP_DATA        0x3d
0122 #define VME_AM_STD_USR_DATA        0x39
0123 #define VME_AM_EXT_SUP_ASCENDING   0x0f
0124 #define VME_AM_EXT_SUP_PGM         0x0e
0125 #define VME_AM_EXT_USR_ASCENDING   0x0b
0126 #define VME_AM_EXT_USR_PGM         0x0a
0127 #define VME_AM_EXT_SUP_DATA        0x0d
0128 #define VME_AM_EXT_USR_DATA        0x09
0129 #define VME_AM_SUP_SHORT_IO        0x2d
0130 #define VME_AM_USR_SHORT_IO        0x29
0131
0132 /*
0133  * 'Extended' BSP support
0134  */
0135 rtems_status_code bspExtInit(void);
0136 typedef void (*BSP_VME_ISR_t)(void *usrArg, unsigned long vector);
0137 BSP_VME_ISR_t BSP_getVME_isr(unsigned long vector, void **parg);
0138 int BSP_installVME_isr(unsigned long vector, BSP_VME_ISR_t handler, void *usrArg);
0139 int BSP_removeVME_isr(unsigned long vector, BSP_VME_ISR_t handler, void *usrArg);
0140 int BSP_enableVME_int_lvl(unsigned int level);
0141 int BSP_disableVME_int_lvl(unsigned int level);
0142 int BSP_vme2local_adrs(unsigned am, unsigned long vmeaddr, unsigned long *plocaladdr);
0143
0144 /*
0145  *  This BSP provides its own IDLE task to override the RTEMS one.
0146  *  So we prototype it and define the constant confdefs.h expects
0147  *  to configure a BSP specific one.
0148  */
0149 void *bsp_idle_thread( uintptr_t ignored );
0150 #define BSP_IDLE_TASK_BODY bsp_idle_thread
0151
0152 /*
0153  *  The custom IDLE task keeps some idle statistics.
0154  */
0155 int bsp_cpu_load_percentage(void);
0156
0157 /*
0158  *  This is a helper method to determine the cause of a reset.
0159  */
0160 void bsp_reset_cause(char *buf, size_t capacity);
0161
0162 /*
0163  * SRAM. The BSP uses SRAM for maintaining some clock-driver data
0164  *       and for ethernet descriptors (and the initial stack during
0165  *       early boot).
0166  */
0167
0168 typedef struct mcf5282BufferDescriptor_ {
0169     volatile uint16_t   status;
0170     uint16_t            length;
0171     volatile void      *buffer;
0172 } mcf5282BufferDescriptor_t;
0173
0174 extern struct {
0175     uint32_t                  idle_counter;
0176     uint32_t                  filtered_idle;
0177     uint32_t                  max_idle_count;
0178     uint32_t                  pitc_per_tick;
0179     uint32_t                  nsec_per_pitc;
0180     uint32_t                  pad[3]; /* align to 16-bytes for descriptors */
0181     mcf5282BufferDescriptor_t fec_descriptors[];
0182     /* buffer descriptors are allocated from here */
0183
0184     /* initial stack is at top of SRAM (start.S)  */
0185 } __SRAMBASE;
0186
0187 #ifdef __cplusplus
0188 }
0189 #endif
0190
0191 /** @} */
0192
0193 #endif