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0001 |
0002 | fpsp.h 3.3 3.3
0003 |
0004 | Copyright (C) Motorola, Inc. 1990
0005 | All Rights Reserved
0006 |
0007 | THIS IS UNPUBLISHED PROPRIETARY SOURCE CODE OF MOTOROLA
0008 | The copyright notice above does not evidence any
0009 | actual or intended publication of such source code.
0010
0011 | fpsp.h --- stack frame offsets during FPSP exception handling
0012 |
0013 | These equates are used to access the exception frame, the fsave
0014 | frame and any local variables needed by the FPSP package.
0015 |
0016 | All FPSP handlers begin by executing:
0017 |
0018 | link a6,#-LOCAL_SIZE
0019 | fsave -(a7)
0020 | movem.l d0-d1/a0-a1,USER_DA(a6)
0021 | fmovem.x fp0-fp3,USER_FP0(a6)
0022 | fmove.l fpsr/fpcr/fpiar,USER_FPSR(a6)
0023 |
0024 | After initialization, the stack looks like this:
0025 |
0026 | A7 ---> +-------------------------------+
0027 | | |
0028 | | FPU fsave area |
0029 | | |
0030 | +-------------------------------+
0031 | | |
0032 | | FPSP Local Variables |
0033 | | including |
0034 | | saved registers |
0035 | | |
0036 | +-------------------------------+
0037 | A6 ---> | Saved A6 |
0038 | +-------------------------------+
0039 | | |
0040 | | Exception Frame |
0041 | | |
0042 | | |
0043 |
0044 | Positive offsets from A6 refer to the exception frame. Negative
0045 | offsets refer to the Local Variable area and the fsave area.
0046 | The fsave frame is also accessible 'from the top' via A7.
0047 |
0048 | On exit, the handlers execute:
0049 |
0050 | movem.l USER_DA(a6),d0-d1/a0-a1
0051 | fmovem.x USER_FP0(a6),fp0-fp3
0052 | fmove.l USER_FPSR(a6),fpsr/fpcr/fpiar
0053 | frestore (a7)+
0054 | unlk a6
0055 |
0056 | and then either 'bra fpsp_done' if the exception was completely
0057 | handled by the package, or 'bra real_xxxx' which is an external
0058 | label to a routine that will process a real exception of the
0059 | type that was generated. Some handlers may omit the 'frestore'
0060 | if the FPU state after the exception is idle.
0061 |
0062 | Sometimes the exception handler will transform the fsave area
0063 | because it needs to report an exception back to the user. This
0064 | can happen if the package is entered for an unimplemented float
0065 | instruction that generates (say) an underflow. Alternatively,
0066 | a second fsave frame can be pushed onto the stack and the
0067 | handler exit code will reload the new frame and discard the old.
0068 |
0069 | The registers d0, d1, a0, a1 and fp0-fp3 are always saved and
0070 | restored from the 'local variable' area and can be used as
0071 | temporaries. If a routine needs to change any
0072 | of these registers, it should modify the saved copy and let
0073 | the handler exit code restore the value.
0074 |
0075 |----------------------------------------------------------------------
0076 |
0077 | Local Variables on the stack
0078 |
0079 .set LOCAL_SIZE,192 | bytes needed for local variables
0080 .set LV,-LOCAL_SIZE | convenient base value
0081 |
0082 .set USER_DA,LV+0 | save space for D0-D1,A0-A1
0083 .set USER_D0,LV+0 | saved user D0
0084 .set USER_D1,LV+4 | saved user D1
0085 .set USER_A0,LV+8 | saved user A0
0086 .set USER_A1,LV+12 | saved user A1
0087 .set USER_FP0,LV+16 | saved user FP0
0088 .set USER_FP1,LV+28 | saved user FP1
0089 .set USER_FP2,LV+40 | saved user FP2
0090 .set USER_FP3,LV+52 | saved user FP3
0091 .set USER_FPCR,LV+64 | saved user FPCR
0092 .set FPCR_ENABLE,USER_FPCR+2 | FPCR exception enable
0093 .set FPCR_MODE,USER_FPCR+3 | FPCR rounding mode control
0094 .set USER_FPSR,LV+68 | saved user FPSR
0095 .set FPSR_CC,USER_FPSR+0 | FPSR condition code
0096 .set FPSR_QBYTE,USER_FPSR+1 | FPSR quotient
0097 .set FPSR_EXCEPT,USER_FPSR+2 | FPSR exception
0098 .set FPSR_AEXCEPT,USER_FPSR+3 | FPSR accrued exception
0099 .set USER_FPIAR,LV+72 | saved user FPIAR
0100 .set FP_SCR1,LV+76 | room for a temporary float value
0101 .set FP_SCR2,LV+92 | room for a temporary float value
0102 .set L_SCR1,LV+108 | room for a temporary long value
0103 .set L_SCR2,LV+112 | room for a temporary long value
0104 .set STORE_FLG,LV+116
0105 .set BINDEC_FLG,LV+117 | used in bindec
0106 .set DNRM_FLG,LV+118 | used in res_func
0107 .set RES_FLG,LV+119 | used in res_func
0108 .set DY_MO_FLG,LV+120 | dyadic/monadic flag
0109 .set UFLG_TMP,LV+121 | temporary for uflag errata
0110 .set CU_ONLY,LV+122 | cu-only flag
0111 .set VER_TMP,LV+123 | temp holding for version number
0112 .set L_SCR3,LV+124 | room for a temporary long value
0113 .set FP_SCR3,LV+128 | room for a temporary float value
0114 .set FP_SCR4,LV+144 | room for a temporary float value
0115 .set FP_SCR5,LV+160 | room for a temporary float value
0116 .set FP_SCR6,LV+176
0117 |
0118 |NEXT equ LV+192 ;need to increase LOCAL_SIZE
0119 |
0120 |--------------------------------------------------------------------------
0121 |
0122 | fsave offsets and bit definitions
0123 |
0124 | Offsets are defined from the end of an fsave because the last 10
0125 | words of a busy frame are the same as the unimplemented frame.
0126 |
0127 .set CU_SAVEPC,LV-92 | micro-pc for CU (1 byte)
0128 .set FPR_DIRTY_BITS,LV-91 | fpr dirty bits
0129 |
0130 .set WBTEMP,LV-76 | write back temp (12 bytes)
0131 .set WBTEMP_EX,WBTEMP | wbtemp sign and exponent (2 bytes)
0132 .set WBTEMP_HI,WBTEMP+4 | wbtemp mantissa [63:32] (4 bytes)
0133 .set WBTEMP_LO,WBTEMP+8 | wbtemp mantissa [31:00] (4 bytes)
0134 |
0135 .set WBTEMP_SGN,WBTEMP+2 | used to store sign
0136 |
0137 .set FPSR_SHADOW,LV-64 | fpsr shadow reg
0138 |
0139 .set FPIARCU,LV-60 | Instr. addr. reg. for CU (4 bytes)
0140 |
0141 .set CMDREG2B,LV-52 | cmd reg for machine 2
0142 .set CMDREG3B,LV-48 | cmd reg for E3 exceptions (2 bytes)
0143 |
0144 .set NMNEXC,LV-44 | NMNEXC (unsup,snan bits only)
0145 .set nmn_unsup_bit,1
0146 .set nmn_snan_bit,0
0147 |
0148 .set NMCEXC,LV-43 | NMNEXC & NMCEXC
0149 .set nmn_operr_bit,7
0150 .set nmn_ovfl_bit,6
0151 .set nmn_unfl_bit,5
0152 .set nmc_unsup_bit,4
0153 .set nmc_snan_bit,3
0154 .set nmc_operr_bit,2
0155 .set nmc_ovfl_bit,1
0156 .set nmc_unfl_bit,0
0157 |
0158 .set STAG,LV-40 | source tag (1 byte)
0159 .set WBTEMP_GRS,LV-40 | alias wbtemp guard, round, sticky
0160 .set guard_bit,1 | guard bit is bit number 1
0161 .set round_bit,0 | round bit is bit number 0
0162 .set stag_mask,0xE0 | upper 3 bits are source tag type
0163 .set denorm_bit,7 | bit determins if denorm or unnorm
0164 .set etemp15_bit,4 | etemp exponent bit #15
0165 .set wbtemp66_bit,2 | wbtemp mantissa bit #66
0166 .set wbtemp1_bit,1 | wbtemp mantissa bit #1
0167 .set wbtemp0_bit,0 | wbtemp mantissa bit #0
0168 |
0169 .set STICKY,LV-39 | holds sticky bit
0170 .set sticky_bit,7
0171 |
0172 .set CMDREG1B,LV-36 | cmd reg for E1 exceptions (2 bytes)
0173 .set kfact_bit,12 | distinguishes static/dynamic k-factor
0174 | ;on packed move outs. NOTE: this
0175 | ;equate only works when CMDREG1B is in
0176 | ;a register.
0177 |
0178 .set CMDWORD,LV-35 | command word in cmd1b
0179 .set direction_bit,5 | bit 0 in opclass
0180 .set size_bit2,12 | bit 2 in size field
0181 |
0182 .set DTAG,LV-32 | dest tag (1 byte)
0183 .set dtag_mask,0xE0 | upper 3 bits are dest type tag
0184 .set fptemp15_bit,4 | fptemp exponent bit #15
0185 |
0186 .set WB_BYTE,LV-31 | holds WBTE15 bit (1 byte)
0187 .set wbtemp15_bit,4 | wbtemp exponent bit #15
0188 |
0189 .set E_BYTE,LV-28 | holds E1 and E3 bits (1 byte)
0190 .set E1,2 | which bit is E1 flag
0191 .set E3,1 | which bit is E3 flag
0192 .set SFLAG,0 | which bit is S flag
0193 |
0194 .set T_BYTE,LV-27 | holds T and U bits (1 byte)
0195 .set XFLAG,7 | which bit is X flag
0196 .set UFLAG,5 | which bit is U flag
0197 .set TFLAG,4 | which bit is T flag
0198 |
0199 .set FPTEMP,LV-24 | fptemp (12 bytes)
0200 .set FPTEMP_EX,FPTEMP | fptemp sign and exponent (2 bytes)
0201 .set FPTEMP_HI,FPTEMP+4 | fptemp mantissa [63:32] (4 bytes)
0202 .set FPTEMP_LO,FPTEMP+8 | fptemp mantissa [31:00] (4 bytes)
0203 |
0204 .set FPTEMP_SGN,FPTEMP+2 | used to store sign
0205 |
0206 .set ETEMP,LV-12 | etemp (12 bytes)
0207 .set ETEMP_EX,ETEMP | etemp sign and exponent (2 bytes)
0208 .set ETEMP_HI,ETEMP+4 | etemp mantissa [63:32] (4 bytes)
0209 .set ETEMP_LO,ETEMP+8 | etemp mantissa [31:00] (4 bytes)
0210 |
0211 .set ETEMP_SGN,ETEMP+2 | used to store sign
0212 |
0213 .set EXC_SR,4 | exception frame status register
0214 .set EXC_PC,6 | exception frame program counter
0215 .set EXC_VEC,10 | exception frame vector (format+vector#)
0216 .set EXC_EA,12 | exception frame effective address
0217 |
0218 |--------------------------------------------------------------------------
0219 |
0220 | FPSR/FPCR bits
0221 |
0222 .set neg_bit,3 | negative result
0223 .set z_bit,2 | zero result
0224 .set inf_bit,1 | infinity result
0225 .set nan_bit,0 | not-a-number result
0226 |
0227 .set q_sn_bit,7 | sign bit of quotient byte
0228 |
0229 .set bsun_bit,7 | branch on unordered
0230 .set snan_bit,6 | signalling nan
0231 .set operr_bit,5 | operand error
0232 .set ovfl_bit,4 | overflow
0233 .set unfl_bit,3 | underflow
0234 .set dz_bit,2 | divide by zero
0235 .set inex2_bit,1 | inexact result 2
0236 .set inex1_bit,0 | inexact result 1
0237 |
0238 .set aiop_bit,7 | accrued illegal operation
0239 .set aovfl_bit,6 | accrued overflow
0240 .set aunfl_bit,5 | accrued underflow
0241 .set adz_bit,4 | accrued divide by zero
0242 .set ainex_bit,3 | accrued inexact
0243 |
0244 | FPSR individual bit masks
0245 |
0246 .set neg_mask,0x08000000
0247 .set z_mask,0x04000000
0248 .set inf_mask,0x02000000
0249 .set nan_mask,0x01000000
0250 |
0251 .set bsun_mask,0x00008000
0252 .set snan_mask,0x00004000
0253 .set operr_mask,0x00002000
0254 .set ovfl_mask,0x00001000
0255 .set unfl_mask,0x00000800
0256 .set dz_mask,0x00000400
0257 .set inex2_mask,0x00000200
0258 .set inex1_mask,0x00000100
0259 |
0260 .set aiop_mask,0x00000080 | accrued illegal operation
0261 .set aovfl_mask,0x00000040 | accrued overflow
0262 .set aunfl_mask,0x00000020 | accrued underflow
0263 .set adz_mask,0x00000010 | accrued divide by zero
0264 .set ainex_mask,0x00000008 | accrued inexact
0265 |
0266 | FPSR combinations used in the FPSP
0267 |
0268 .set dzinf_mask,inf_mask+dz_mask+adz_mask
0269 .set opnan_mask,nan_mask+operr_mask+aiop_mask
0270 .set nzi_mask,0x01ffffff | clears N, Z, and I
0271 .set unfinx_mask,unfl_mask+inex2_mask+aunfl_mask+ainex_mask
0272 .set unf2inx_mask,unfl_mask+inex2_mask+ainex_mask
0273 .set ovfinx_mask,ovfl_mask+inex2_mask+aovfl_mask+ainex_mask
0274 .set inx1a_mask,inex1_mask+ainex_mask
0275 .set inx2a_mask,inex2_mask+ainex_mask
0276 .set snaniop_mask,nan_mask+snan_mask+aiop_mask
0277 .set naniop_mask,nan_mask+aiop_mask
0278 .set neginf_mask,neg_mask+inf_mask
0279 .set infaiop_mask,inf_mask+aiop_mask
0280 .set negz_mask,neg_mask+z_mask
0281 .set opaop_mask,operr_mask+aiop_mask
0282 .set unfl_inx_mask,unfl_mask+aunfl_mask+ainex_mask
0283 .set ovfl_inx_mask,ovfl_mask+aovfl_mask+ainex_mask
0284 |
0285 |--------------------------------------------------------------------------
0286 |
0287 | FPCR rounding modes
0288 |
0289 .set x_mode,0x00 | round to extended
0290 .set s_mode,0x40 | round to single
0291 .set d_mode,0x80 | round to double
0292 |
0293 .set rn_mode,0x00 | round nearest
0294 .set rz_mode,0x10 | round to zero
0295 .set rm_mode,0x20 | round to minus infinity
0296 .set rp_mode,0x30 | round to plus infinity
0297 |
0298 |--------------------------------------------------------------------------
0299 |
0300 | Miscellaneous equates
0301 |
0302 .set signan_bit,6 | signalling nan bit in mantissa
0303 .set sign_bit,7
0304 |
0305 .set rnd_stky_bit,29 | round/sticky bit of mantissa
0306 | this can only be used if in a data register
0307 .set sx_mask,0x01800000 | set s and x bits in word $48
0308 |
0309 .set LOCAL_EX,0
0310 .set LOCAL_SGN,2
0311 .set LOCAL_HI,4
0312 .set LOCAL_LO,8
0313 .set LOCAL_GRS,12 | valid ONLY for FP_SCR1, FP_SCR2
0314 |
0315 |
0316 .set norm_tag,0x00 | tag bits in {7:5} position
0317 .set zero_tag,0x20
0318 .set inf_tag,0x40
0319 .set nan_tag,0x60
0320 .set dnrm_tag,0x80
0321 |
0322 | fsave sizes and formats
0323 |
0324 .set VER_4,0x40 | fpsp compatible version numbers
0325 | are in the $40s {$40-$4f}
0326 .set VER_40,0x40 | original version number
0327 .set VER_41,0x41 | revision version number
0328 |
0329 .set BUSY_SIZE,100 | size of busy frame
0330 .set BUSY_FRAME,LV-BUSY_SIZE | start of busy frame
0331 |
0332 .set UNIMP_40_SIZE,44 | size of orig unimp frame
0333 .set UNIMP_41_SIZE,52 | size of rev unimp frame
0334 |
0335 .set IDLE_SIZE,4 | size of idle frame
0336 .set IDLE_FRAME,LV-IDLE_SIZE | start of idle frame
0337 |
0338 | exception vectors
0339 |
0340 .set TRACE_VEC,0x2024 | trace trap
0341 .set FLINE_VEC,0x002C | 'real' F-line
0342 .set UNIMP_VEC,0x202C | unimplemented
0343 .set INEX_VEC,0x00C4
0344 |
0345 .set dbl_thresh,0x3C01
0346 .set sgl_thresh,0x3F81
0347 |
