File indexing completed on 2025-05-11 08:23:48
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0128 #define M167_INIT
0129
0130 #include <stdarg.h>
0131 #include <stdio.h>
0132 #include <termios.h>
0133
0134 #include <rtems/console.h>
0135 #include <rtems/libio.h>
0136 #include <rtems/termiostypes.h>
0137 #include <bsp.h> /* Must be before libio.h */
0138
0139
0140 void cd2401_udelay( unsigned long delay );
0141 void cd2401_chan_cmd( uint8_t channel, uint8_t cmd, uint8_t wait );
0142 uint16_t cd2401_bitrate_divisor( uint32_t clkrate, uint32_t * bitrate );
0143 void cd2401_initialize( void );
0144 void cd2401_interrupts_initialize( bool enable );
0145
0146
0147 rtems_isr cd2401_modem_isr( rtems_vector_number vector );
0148 rtems_isr cd2401_re_isr( rtems_vector_number vector );
0149 rtems_isr cd2401_rx_isr( rtems_vector_number vector );
0150 rtems_isr cd2401_tx_isr( rtems_vector_number vector );
0151
0152
0153 int cd2401_firstOpen( int major, int minor, void *arg );
0154 int cd2401_lastClose( int major, int minor, void *arg );
0155 int cd2401_setAttributes( int minor, const struct termios *t );
0156 int cd2401_startRemoteTx( int minor );
0157 int cd2401_stopRemoteTx( int minor );
0158 ssize_t cd2401_write( int minor, const char *buf, size_t len );
0159 int cd2401_drainOutput( int minor );
0160 int _167Bug_pollRead( int minor );
0161 ssize_t _167Bug_pollWrite( int minor, const char *buf, size_t len );
0162
0163
0164 static void _BSP_output_char( char c );
0165 BSP_output_char_function_type BSP_output_char = _BSP_output_char;
0166 BSP_polling_getchar_function_type BSP_poll_char = NULL;
0167
0168
0169
0170
0171
0172
0173
0174
0175 static const char cr_char = '\r';
0176
0177
0178 volatile struct {
0179 void *tty;
0180 int len;
0181 const char *buf;
0182 uint32_t spur_cnt;
0183 uint32_t spur_dev;
0184 uint32_t buserr_addr;
0185 uint32_t buserr_type;
0186 uint8_t own_buf_A;
0187 uint8_t own_buf_B;
0188 uint8_t txEmpty;
0189 } CD2401_Channel_Info[4];
0190
0191
0192
0193
0194
0195
0196
0197
0198
0199
0200 uint8_t Init_count;
0201
0202
0203 rtems_isr_entry Prev_re_isr;
0204 rtems_isr_entry Prev_rx_isr;
0205 rtems_isr_entry Prev_tx_isr;
0206 rtems_isr_entry Prev_modem_isr;
0207
0208
0209
0210 #include "console-recording.h"
0211
0212
0213
0214
0215
0216
0217
0218
0219
0220
0221
0222
0223
0224
0225
0226
0227
0228 void cd2401_udelay
0229 (
0230 unsigned long delay
0231 )
0232 {
0233 unsigned long i = 20000;
0234 rtems_interval start_ticks, end_ticks, current_ticks;
0235
0236 start_ticks = rtems_clock_get_ticks_since_boot();
0237 end_ticks = start_ticks + delay;
0238
0239 do {
0240 current_ticks = rtems_clock_get_ticks_since_boot();
0241 } while ( --i && (current_ticks <= end_ticks) );
0242
0243 CD2401_RECORD_DELAY_INFO(( start_ticks, end_ticks, current_ticks, i ));
0244 }
0245
0246
0247
0248
0249
0250
0251
0252
0253
0254
0255
0256
0257
0258
0259
0260
0261
0262
0263 void cd2401_chan_cmd(
0264 uint8_t channel,
0265 uint8_t cmd,
0266 uint8_t wait
0267 )
0268 {
0269 if ( channel < 4 ) {
0270 cd2401->car = channel;
0271
0272 while ( cd2401->ccr != 0 );
0273 cd2401->ccr = cmd;
0274 if ( wait )
0275 while( cd2401->ccr != 0 );
0276 }
0277 else {
0278
0279 rtems_fatal_error_occurred( RTEMS_INVALID_NUMBER );
0280 }
0281 }
0282
0283
0284
0285
0286
0287
0288
0289
0290
0291
0292
0293
0294
0295
0296
0297
0298
0299 uint16_t cd2401_bitrate_divisor(
0300 uint32_t clkrate,
0301 uint32_t * bitrate
0302 )
0303 {
0304 uint32_t divisor;
0305 uint16_t clksource;
0306
0307 divisor = *bitrate << 3;
0308 divisor = (clkrate + (divisor>>1)) / divisor;
0309
0310
0311 for( clksource = 0; clksource < 0x0400 && divisor > 0x100; clksource += 0x0100 )
0312 divisor >>= 2;
0313 divisor--;
0314 if( divisor < 1 )
0315 divisor = 1;
0316 else if( divisor > 0xFF )
0317 divisor = 0xFF;
0318 *bitrate = clkrate / (1 << ((clksource >> 7)+3)) / (divisor+1);
0319 return( clksource | divisor );
0320 }
0321
0322
0323
0324
0325
0326
0327
0328
0329
0330
0331
0332
0333
0334 void cd2401_initialize( void )
0335 {
0336 int i;
0337
0338 for ( i = 3; i >= 0; i-- ) {
0339 CD2401_Channel_Info[i].tty = NULL;
0340 CD2401_Channel_Info[i].len = 0;
0341 CD2401_Channel_Info[i].buf = NULL;
0342 CD2401_Channel_Info[i].spur_cnt = 0;
0343 CD2401_Channel_Info[i].spur_dev = 0;
0344 CD2401_Channel_Info[i].buserr_type = 0;
0345 CD2401_Channel_Info[i].buserr_addr = 0;
0346 CD2401_Channel_Info[i].own_buf_A = TRUE;
0347 CD2401_Channel_Info[i].own_buf_B = TRUE;
0348 CD2401_Channel_Info[i].txEmpty = TRUE;
0349 }
0350
0351
0352
0353
0354
0355
0356 #if 0
0357 cd2401->gfrcr = 0;
0358 cd2401_chan_cmd( 0x10, 0);
0359 while(cd2401->gfrcr == 0);
0360 #endif
0361
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0363
0364
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0367
0368
0369
0370
0371
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0373
0374
0375
0376
0377
0378 for ( i = 0; i < 4; i++ ) {
0379 cd2401->car = i;
0380 cd2401->livr = 0x5C;
0381 cd2401->licr = i << 2;
0382 cd2401->ier = 0;
0383 }
0384
0385
0386
0387
0388
0389
0390
0391 cd2401->mpilr = 0x01;
0392 cd2401->tpilr = 0x02;
0393 cd2401->rpilr = 0x03;
0394
0395
0396 cd2401->dmr = 0;
0397 cd2401->bercnt = 0;
0398
0399
0400
0401
0402
0403
0404
0405 cd2401->tpr = 0x0A;
0406 }
0407
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0411
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0413
0414
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0416
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0422
0423
0424 void cd2401_interrupts_initialize(
0425 bool enable
0426 )
0427 {
0428 if ( enable ) {
0429
0430
0431
0432
0433
0434
0435
0436 pccchip2->SCC_error = 0x01;
0437 pccchip2->SCC_modem_int_ctl = 0x10 | CD2401_INT_LEVEL;
0438 pccchip2->SCC_tx_int_ctl = 0x10 | CD2401_INT_LEVEL;
0439 pccchip2->SCC_rx_int_ctl = 0x50 | CD2401_INT_LEVEL;
0440
0441 pccchip2->gen_control |= 0x02;
0442 }
0443 else {
0444
0445 pccchip2->SCC_modem_int_ctl &= 0xEF;
0446 pccchip2->SCC_tx_int_ctl &= 0xEF;
0447 pccchip2->SCC_rx_int_ctl &= 0xEF;
0448 }
0449 }
0450
0451
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0453
0454
0455
0456
0457
0458
0459
0460
0461
0462
0463
0464
0465
0466 rtems_isr cd2401_modem_isr(
0467 rtems_vector_number vector
0468 )
0469 {
0470 uint8_t ch;
0471
0472
0473 ch = cd2401->licr >> 2;
0474
0475
0476 CD2401_Channel_Info[ch].spur_dev =
0477 (vector << 24) | (cd2401->stk << 16) | (cd2401->mir << 8) | cd2401->misr;
0478 CD2401_Channel_Info[ch].spur_cnt++;
0479
0480 cd2401->meoir = 0;
0481 CD2401_RECORD_MODEM_ISR_SPURIOUS_INFO(( ch,
0482 CD2401_Channel_Info[ch].spur_dev,
0483 CD2401_Channel_Info[ch].spur_cnt ));
0484 }
0485
0486
0487
0488
0489
0490
0491
0492
0493
0494
0495
0496
0497
0498
0499
0500
0501 rtems_isr cd2401_re_isr(
0502 rtems_vector_number vector
0503 )
0504 {
0505 uint8_t ch;
0506
0507
0508 ch = cd2401->licr >> 2;
0509
0510
0511 CD2401_Channel_Info[ch].spur_dev =
0512 (vector << 24) | (cd2401->stk << 16) | (cd2401->rir << 8) | cd2401->u5.b.risrl;
0513 CD2401_Channel_Info[ch].spur_cnt++;
0514
0515 if ( cd2401->u5.b.risrl & 0x80 )
0516 cd2401->ier &= 0xDF;
0517 cd2401->reoir = 0x08;
0518 CD2401_RECORD_RE_ISR_SPURIOUS_INFO(( ch,
0519 CD2401_Channel_Info[ch].spur_dev,
0520 CD2401_Channel_Info[ch].spur_cnt ));
0521 }
0522
0523
0524
0525
0526
0527
0528
0529
0530
0531
0532
0533
0534
0535 rtems_isr cd2401_rx_isr(
0536 rtems_vector_number vector
0537 )
0538 {
0539 char c;
0540 uint8_t ch, status, nchars, total;
0541 #ifdef CD2401_RECORD_DEBUG_INFO
0542 uint8_t i = 0;
0543 char buffer[256];
0544 #endif
0545
0546 (void) total;
0547
0548 status = cd2401->u5.b.risrl;
0549 ch = cd2401->licr >> 2;
0550
0551
0552 if ( CD2401_Channel_Info[ch].tty && !status ) {
0553
0554 total = nchars = cd2401->rfoc;
0555 while ( nchars-- > 0 ) {
0556 c = (char)cd2401->dr;
0557 rtems_termios_enqueue_raw_characters( CD2401_Channel_Info[ch].tty ,&c, 1 );
0558 #ifdef CD2401_RECORD_DEBUG_INFO
0559 buffer[i++] = c;
0560 #endif
0561 }
0562 cd2401->reoir = 0;
0563 CD2401_RECORD_RX_ISR_INFO(( ch, total, buffer ));
0564 } else {
0565
0566 CD2401_Channel_Info[ch].spur_dev =
0567 (vector << 24) | (cd2401->stk << 16) | (cd2401->rir << 8) | cd2401->u5.b.risrl;
0568 CD2401_Channel_Info[ch].spur_cnt++;
0569 cd2401->reoir = 0x04;
0570 CD2401_RECORD_RX_ISR_SPURIOUS_INFO(( ch, status,
0571 CD2401_Channel_Info[ch].spur_dev,
0572 CD2401_Channel_Info[ch].spur_cnt ));
0573 }
0574 }
0575
0576
0577
0578
0579
0580
0581
0582
0583
0584
0585
0586
0587
0588 rtems_isr cd2401_tx_isr(
0589 rtems_vector_number vector
0590 )
0591 {
0592 uint8_t ch, status, buserr, initial_ier, final_ier;
0593
0594 status = cd2401->tisr;
0595 ch = cd2401->licr >> 2;
0596 initial_ier = cd2401->ier;
0597
0598 #ifndef CD2401_RECORD_DEBUG_INFO
0599
0600
0601
0602
0603 (void) initial_ier;
0604 (void) final_ier;
0605 #endif
0606
0607
0608 if ( !CD2401_Channel_Info[ch].tty ) {
0609
0610 CD2401_Channel_Info[ch].spur_dev =
0611 (vector << 24) | (cd2401->stk << 16) | (cd2401->tir << 8) | cd2401->tisr;
0612 CD2401_Channel_Info[ch].spur_cnt++;
0613 final_ier = cd2401->ier &= 0xFC;
0614
0615 cd2401->teoir = 0x88;
0616 CD2401_RECORD_TX_ISR_SPURIOUS_INFO(( ch, status, initial_ier, final_ier,
0617 CD2401_Channel_Info[ch].spur_dev,
0618 CD2401_Channel_Info[ch].spur_cnt ));
0619 return;
0620 }
0621
0622 if ( status & 0x80 ) {
0623
0624
0625
0626
0627
0628 buserr = pccchip2->SCC_error;
0629 pccchip2->SCC_error = 0x01;
0630 CD2401_Channel_Info[ch].buserr_type =
0631 (vector << 24) | (buserr << 16) | (cd2401->tir << 8) | cd2401->tisr;
0632 CD2401_Channel_Info[ch].buserr_addr =
0633 (((uint32_t)cd2401->tcbadru) << 16) | cd2401->tcbadrl;
0634
0635 cd2401->teoir = 0x80;
0636 CD2401_RECORD_TX_ISR_BUSERR_INFO(( ch, status, initial_ier, buserr,
0637 CD2401_Channel_Info[ch].buserr_type,
0638 CD2401_Channel_Info[ch].buserr_addr ));
0639 return;
0640 }
0641
0642 if ( status & 0x20 ) {
0643
0644 final_ier = cd2401->ier = (cd2401->ier & 0xFE) | 0x02;
0645 if( status & 0x08 ) {
0646
0647 CD2401_Channel_Info[ch].own_buf_B = TRUE;
0648 }
0649 else {
0650
0651 CD2401_Channel_Info[ch].own_buf_A = TRUE;
0652 }
0653 CD2401_RECORD_TX_ISR_INFO(( ch, status, initial_ier, final_ier,
0654 CD2401_Channel_Info[ch].txEmpty ));
0655
0656
0657 rtems_termios_dequeue_characters (
0658 CD2401_Channel_Info[ch].tty,
0659 CD2401_Channel_Info[ch].len );
0660 cd2401->teoir = 0x08;
0661 }
0662 else if ( status & 0x02 ) {
0663
0664 CD2401_Channel_Info[ch].txEmpty = TRUE;
0665 final_ier = cd2401->ier &= 0xFD;
0666 cd2401->teoir = 0x08;
0667 CD2401_RECORD_TX_ISR_INFO(( ch, status, initial_ier, final_ier,
0668 CD2401_Channel_Info[ch].txEmpty ));
0669 }
0670 else {
0671
0672 CD2401_Channel_Info[ch].spur_dev =
0673 (vector << 24) | (cd2401->stk << 16) | (cd2401->tir << 8) | cd2401->tisr;
0674 CD2401_Channel_Info[ch].spur_cnt++;
0675 cd2401->teoir = 0x08;
0676 CD2401_RECORD_TX_ISR_SPURIOUS_INFO(( ch, status, initial_ier, 0xFF,
0677 CD2401_Channel_Info[ch].spur_dev,
0678 CD2401_Channel_Info[ch].spur_cnt ));
0679 }
0680 }
0681
0682
0683
0684
0685
0686
0687
0688
0689
0690
0691
0692
0693
0694
0695
0696
0697
0698
0699
0700
0701 int cd2401_firstOpen(
0702 int major,
0703 int minor,
0704 void *arg
0705 )
0706 {
0707 rtems_libio_open_close_args_t *args = arg;
0708 rtems_libio_ioctl_args_t newarg;
0709 struct termios termios;
0710 rtems_status_code sc;
0711 rtems_interrupt_level level;
0712
0713 rtems_interrupt_disable (level);
0714
0715
0716
0717
0718
0719
0720
0721
0722
0723
0724
0725
0726
0727 newarg.iop = args->iop;
0728 newarg.command = TIOCGETA;
0729 newarg.buffer = &termios;
0730 sc = rtems_termios_ioctl (&newarg);
0731 if (sc != RTEMS_SUCCESSFUL)
0732 rtems_fatal_error_occurred (sc);
0733
0734
0735
0736
0737
0738
0739
0740 termios.c_cflag |= CLOCAL;
0741 newarg.command = TIOCGETA;
0742 sc = rtems_termios_ioctl (&newarg);
0743 if (sc != RTEMS_SUCCESSFUL)
0744 rtems_fatal_error_occurred (sc);
0745
0746
0747 CD2401_Channel_Info[minor].tty = args->iop->data1;
0748
0749
0750 if ( !Init_count++ ) {
0751
0752 Prev_re_isr = (rtems_isr_entry) set_vector( cd2401_re_isr, 0x5C, 1 );
0753 Prev_modem_isr = (rtems_isr_entry) set_vector( cd2401_modem_isr, 0x5D, 1 );
0754 Prev_tx_isr = (rtems_isr_entry) set_vector( cd2401_tx_isr, 0x5E, 1 );
0755 Prev_rx_isr = (rtems_isr_entry) set_vector( cd2401_rx_isr, 0x5F, 1 );
0756
0757 cd2401_interrupts_initialize( TRUE );
0758 }
0759
0760 CD2401_RECORD_FIRST_OPEN_INFO(( minor, Init_count ));
0761
0762 rtems_interrupt_enable (level);
0763
0764
0765 return RTEMS_SUCCESSFUL;
0766 }
0767
0768
0769
0770
0771
0772
0773
0774
0775
0776
0777
0778 int cd2401_lastClose(
0779 int major,
0780 int minor,
0781 void *arg
0782 )
0783 {
0784 rtems_interrupt_level level;
0785
0786 rtems_interrupt_disable (level);
0787
0788
0789 CD2401_Channel_Info[minor].tty = NULL;
0790
0791
0792 if ( !--Init_count ) {
0793 cd2401_interrupts_initialize( FALSE );
0794
0795
0796 set_vector( Prev_re_isr, 0x5C, 1 );
0797 set_vector( Prev_modem_isr, 0x5D, 1 );
0798 set_vector( Prev_tx_isr, 0x5E, 1 );
0799 set_vector( Prev_rx_isr, 0x5F, 1 );
0800 }
0801
0802 CD2401_RECORD_LAST_CLOSE_INFO(( minor, Init_count ));
0803
0804 rtems_interrupt_enable (level);
0805
0806
0807 return RTEMS_SUCCESSFUL;
0808 }
0809
0810
0811
0812
0813
0814
0815
0816
0817
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0829
0830 int cd2401_setAttributes(
0831 int minor,
0832 const struct termios *t
0833 )
0834 {
0835 uint8_t csize, cstopb, parodd, parenb, ignpar, inpck;
0836 uint8_t hw_flow_ctl, sw_flow_ctl, extra_flow_ctl;
0837 uint8_t icrnl, igncr, inlcr, brkint, ignbrk, parmrk, istrip;
0838 uint8_t need_reinitialization = FALSE;
0839 uint8_t read_enabled;
0840 uint16_t tx_period, rx_period;
0841 uint32_t out_baud, in_baud;
0842 rtems_interrupt_level level;
0843
0844
0845
0846
0847 out_baud = rtems_termios_baud_to_number(t->c_ospeed);
0848 in_baud = rtems_termios_baud_to_number(t->c_ispeed);
0849
0850
0851 csize = 0x07;
0852 switch ( t->c_cflag & CSIZE ) {
0853 case CS5: csize = 0x04; break;
0854 case CS6: csize = 0x05; break;
0855 case CS7: csize = 0x06; break;
0856 case CS8: csize = 0x07; break;
0857 }
0858
0859
0860 if ( t->c_cflag & PARODD )
0861 parodd = 0x80;
0862 else
0863 parodd = 0;
0864
0865 if ( t->c_cflag & PARENB )
0866 parenb = 0x40;
0867 else
0868 parenb = 0x00;
0869
0870
0871 if ( t->c_iflag & INPCK )
0872 ignpar = 0;
0873 else
0874 ignpar = 0x10;
0875 if ( t->c_iflag & IGNPAR ) {
0876 inpck = 0x03;
0877 parmrk = 0;
0878 } else {
0879 if ( t->c_iflag & PARMRK ) {
0880 inpck = 0x01;
0881 parmrk = 0x04;
0882 } else {
0883 inpck = 0x01;
0884 parmrk = 0;
0885 }
0886 }
0887
0888
0889 if ( t->c_cflag & CSTOPB )
0890 cstopb = 0x04;
0891 else
0892 cstopb = 0x02;
0893
0894
0895 if ( t->c_cflag & CLOCAL )
0896 hw_flow_ctl = 0x04;
0897 else
0898 hw_flow_ctl = 0x07;
0899
0900
0901
0902 if ( t->c_iflag & IXON ) {
0903 sw_flow_ctl = 0x40;
0904 extra_flow_ctl = 0x30;
0905 }
0906 else {
0907 sw_flow_ctl = 0;
0908 extra_flow_ctl = 0;
0909 }
0910
0911
0912 if ( t->c_iflag & ICRNL )
0913 icrnl = 0x40;
0914 else
0915 icrnl = 0;
0916 if ( t->c_iflag & INLCR )
0917 inlcr = 0x20;
0918 else
0919 inlcr = 0;
0920 if ( t->c_iflag & IGNCR )
0921 igncr = 0x80;
0922 else
0923 igncr = 0;
0924
0925
0926 if ( t->c_iflag & IGNBRK ) {
0927 ignbrk = 0x10;
0928 brkint = 0x08;
0929 } else {
0930 if ( t->c_iflag & BRKINT ) {
0931 ignbrk = 0;
0932 brkint = 0;
0933 } else {
0934 ignbrk = 0;
0935 brkint = 0x08;
0936 }
0937 }
0938
0939
0940 if ( t->c_iflag & ISTRIP )
0941 istrip = 0x80;
0942 else
0943 istrip = 0;
0944
0945 rx_period = cd2401_bitrate_divisor( 20000000Ul, &in_baud );
0946 tx_period = cd2401_bitrate_divisor( 20000000Ul, &out_baud );
0947
0948
0949
0950
0951
0952
0953
0954
0955
0956 if ( ( CD2401_Channel_Info[minor].tty == 0 ) ||
0957 ( cd2401->cor1 != (parodd | parenb | ignpar | csize) ) ||
0958 ( cd2401->cor2 != (sw_flow_ctl | hw_flow_ctl) ) ||
0959 ( cd2401->cor3 != (extra_flow_ctl | cstopb) ) ||
0960 ( cd2401->cor6 != (igncr | icrnl | inlcr | ignbrk | brkint | parmrk | inpck) ) ||
0961 ( cd2401->cor7 != istrip ) ||
0962 ( cd2401->u1.async.schr1 != t->c_cc[VSTART] ) ||
0963 ( cd2401->u1.async.schr2 != t->c_cc[VSTOP] ) ||
0964 ( cd2401->rbpr != (unsigned char)rx_period ) ||
0965 ( cd2401->rcor != (unsigned char)(rx_period >> 8) ) ||
0966 ( cd2401->tbpr != (unsigned char)tx_period ) ||
0967 ( cd2401->tcor != ( (tx_period >> 3) & 0xE0 ) ) )
0968 need_reinitialization = TRUE;
0969
0970
0971 rtems_interrupt_disable (level);
0972
0973 cd2401->car = minor;
0974 read_enabled = cd2401->csr & 0x80 ? TRUE : FALSE;
0975
0976 if ( (t->c_cflag & CREAD ? TRUE : FALSE ) != read_enabled ) {
0977
0978 need_reinitialization = TRUE;
0979 }
0980
0981 if ( need_reinitialization ) {
0982
0983
0984
0985
0986
0987
0988
0989 cd2401_udelay( 2000L );
0990
0991
0992 cd2401_chan_cmd (minor, 0x40, 1);
0993
0994 cd2401->car = minor;
0995 cd2401->cmr = 0x42;
0996 cd2401->cor1 = parodd | parenb | ignpar | csize;
0997 cd2401->cor2 = sw_flow_ctl | hw_flow_ctl;
0998 cd2401->cor3 = extra_flow_ctl | cstopb;
0999 cd2401->cor4 = 0x0A;
1000 cd2401->cor5 = 0x0A;
1001 cd2401->cor6 = igncr | icrnl | inlcr | ignbrk | brkint | parmrk | inpck;
1002 cd2401->cor7 = istrip;
1003
1004 cd2401->u1.async.schr1 = t->c_cc[VSTART];
1005
1006 cd2401->u1.async.schr2 = t->c_cc[VSTOP];
1007
1008
1009
1010
1011
1012
1013
1014 cd2401->rbpr = (unsigned char)rx_period;
1015 cd2401->rcor = (unsigned char)(rx_period >> 8);
1016 cd2401->tbpr = (unsigned char)tx_period;
1017 cd2401->tcor = (tx_period >> 3) & 0xE0;
1018
1019
1020 cd2401->u2.w.rtpr = 0x04;
1021
1022 if ( t->c_cflag & CREAD ) {
1023
1024 cd2401_chan_cmd (minor, 0x2A, 1);
1025
1026 cd2401->ier = 0x08;
1027 } else {
1028
1029 cd2401_chan_cmd (minor, 0x29, 1);
1030 }
1031 }
1032
1033 CD2401_RECORD_SET_ATTRIBUTES_INFO(( minor, need_reinitialization, csize,
1034 cstopb, parodd, parenb, ignpar, inpck,
1035 hw_flow_ctl, sw_flow_ctl, extra_flow_ctl,
1036 icrnl, igncr, inlcr, brkint, ignbrk,
1037 parmrk, istrip, tx_period, rx_period,
1038 out_baud, in_baud ));
1039
1040 rtems_interrupt_enable (level);
1041
1042
1043
1044
1045
1046
1047 if ( need_reinitialization )
1048 cd2401_udelay( 10000L );
1049
1050
1051 return RTEMS_SUCCESSFUL;
1052 }
1053
1054
1055
1056
1057
1058
1059
1060
1061
1062
1063
1064
1065
1066
1067
1068
1069
1070
1071
1072
1073
1074
1075 int cd2401_startRemoteTx(
1076 int minor
1077 )
1078 {
1079 rtems_interrupt_level level;
1080
1081 rtems_interrupt_disable (level);
1082
1083 cd2401->car = minor;
1084 cd2401->stcr = 0x01;
1085
1086 CD2401_RECORD_START_REMOTE_TX_INFO(( minor ));
1087
1088 rtems_interrupt_enable (level);
1089
1090
1091 return RTEMS_SUCCESSFUL;
1092 }
1093
1094
1095
1096
1097
1098
1099
1100
1101
1102
1103
1104
1105
1106
1107
1108
1109
1110
1111
1112
1113
1114
1115
1116 int cd2401_stopRemoteTx(
1117 int minor
1118 )
1119 {
1120 rtems_interrupt_level level;
1121
1122 rtems_interrupt_disable (level);
1123
1124 cd2401->car = minor;
1125 cd2401->stcr = 0x02;
1126
1127 CD2401_RECORD_STOP_REMOTE_TX_INFO(( minor ));
1128
1129 rtems_interrupt_enable (level);
1130
1131
1132 return RTEMS_SUCCESSFUL;
1133 }
1134
1135
1136
1137
1138
1139
1140
1141
1142
1143
1144
1145
1146
1147
1148
1149
1150
1151
1152
1153
1154
1155 ssize_t cd2401_write(
1156 int minor,
1157 const char *buf,
1158 size_t len
1159 )
1160 {
1161 if (len > 0) {
1162 cd2401->car = minor;
1163
1164 if ( (cd2401->dmabsts & 0x08) == 0 ) {
1165
1166 while ( cd2401->atbsts & 0x01 );
1167
1168 CD2401_Channel_Info[minor].own_buf_A = FALSE;
1169 CD2401_Channel_Info[minor].len = len;
1170 CD2401_Channel_Info[minor].buf = buf;
1171 cd2401->atbadru = (uint16_t)( ( (uint32_t) buf ) >> 16 );
1172 cd2401->atbadrl = (uint16_t)( (uint32_t) buf );
1173 cd2401->atbcnt = len;
1174 CD2401_RECORD_WRITE_INFO(( len, buf, 'A' ));
1175 cd2401->atbsts = 0x03;
1176 }
1177 else {
1178
1179 while ( cd2401->btbsts & 0x01 );
1180
1181 CD2401_Channel_Info[minor].own_buf_B = FALSE;
1182 CD2401_Channel_Info[minor].len = len;
1183 CD2401_Channel_Info[minor].buf = buf;
1184 cd2401->btbadru = (uint16_t)( ( (uint32_t) buf ) >> 16 );
1185 cd2401->btbadrl = (uint16_t)( (uint32_t) buf );
1186 cd2401->btbcnt = len;
1187 CD2401_RECORD_WRITE_INFO(( len, buf, 'B' ));
1188 cd2401->btbsts = 0x03;
1189 }
1190
1191 CD2401_Channel_Info[minor].txEmpty = FALSE;
1192 cd2401->ier |= 0x01;
1193 }
1194
1195
1196 return len;
1197 }
1198
1199 #if 0
1200
1201
1202
1203
1204
1205
1206
1207
1208
1209
1210
1211
1212
1213
1214
1215
1216
1217
1218
1219 int cd2401_drainOutput(
1220 int minor
1221 )
1222 {
1223 CD2401_RECORD_DRAIN_OUTPUT_INFO(( CD2401_Channel_Info[minor].txEmpty,
1224 CD2401_Channel_Info[minor].own_buf_A,
1225 CD2401_Channel_Info[minor].own_buf_B ));
1226
1227 while( ! (CD2401_Channel_Info[minor].txEmpty &&
1228 CD2401_Channel_Info[minor].own_buf_A &&
1229 CD2401_Channel_Info[minor].own_buf_B) );
1230
1231
1232 return RTEMS_SUCCESSFUL;
1233 }
1234 #endif
1235
1236
1237
1238
1239
1240
1241
1242
1243
1244
1245
1246
1247
1248
1249
1250
1251
1252 int _167Bug_pollRead(
1253 int minor
1254 )
1255 {
1256 int char_not_available;
1257 unsigned char c;
1258 rtems_interrupt_level previous_level;
1259
1260
1261
1262
1263
1264
1265 rtems_interrupt_disable( previous_level );
1266
1267 __asm__ volatile( "movew %1, -(%%sp)\n\t"
1268 "trap #15\n\t"
1269 ".short 0x61\n\t"
1270 "trap #15\n\t"
1271 ".short 0x01\n\t"
1272 "move %%cc, %0\n\t"
1273 "andil #4, %0"
1274 : "=d" (char_not_available) : "d" (minor): "%%cc" );
1275
1276 if (char_not_available) {
1277 rtems_interrupt_enable( previous_level );
1278 return -1;
1279 }
1280
1281
1282 __asm__ volatile( "subq.l #2,%%a7\n\t"
1283 "trap #15\n\t"
1284 ".short 0x00\n\t"
1285 "moveb (%%a7)+, %0"
1286 : "=d" (c) : );
1287
1288 rtems_interrupt_enable( previous_level );
1289
1290 return (int)c;
1291 }
1292
1293
1294
1295
1296
1297
1298
1299
1300
1301
1302
1303
1304
1305
1306
1307
1308
1309
1310 ssize_t _167Bug_pollWrite(
1311 int minor,
1312 const char *buf,
1313 size_t len
1314 )
1315 {
1316 const char *endbuf = buf + len;
1317
1318 __asm__ volatile( "pea (%0)\n\t"
1319 "pea (%1)\n\t"
1320 "movew #0x21, -(%%sp)\n\t"
1321 "movew %2, -(%%sp)\n\t"
1322 "trap #15\n\t"
1323 ".short 0x60"
1324 :: "a" (endbuf), "a" (buf), "d" (minor) );
1325
1326
1327 return len;
1328 }
1329
1330
1331
1332
1333
1334
1335
1336
1337
1338
1339
1340
1341
1342
1343
1344
1345
1346
1347
1348
1349
1350
1351
1352
1353 static rtems_status_code do_poll_read(
1354 rtems_device_major_number major,
1355 rtems_device_minor_number minor,
1356 void * arg
1357 )
1358 {
1359 rtems_libio_rw_args_t *rw_args = arg;
1360 int c;
1361
1362 while( (c = _167Bug_pollRead (minor)) == -1 );
1363 rw_args->buffer[0] = (uint8_t)c;
1364 if( rw_args->buffer[0] == '\r' )
1365 rw_args->buffer[0] = '\n';
1366 rw_args->bytes_moved = 1;
1367 return RTEMS_SUCCESSFUL;
1368 }
1369
1370
1371
1372
1373
1374
1375
1376
1377
1378
1379
1380
1381
1382
1383
1384
1385
1386
1387
1388
1389
1390
1391 static rtems_status_code do_poll_write(
1392 rtems_device_major_number major,
1393 rtems_device_minor_number minor,
1394 void * arg
1395 )
1396 {
1397 rtems_libio_rw_args_t *rw_args = arg;
1398 uint32_t i;
1399
1400 for( i = 0; i < rw_args->count; i++ ) {
1401 _167Bug_pollWrite(minor, &(rw_args->buffer[i]), 1);
1402 if ( rw_args->buffer[i] == '\n' )
1403 _167Bug_pollWrite(minor, &cr_char, 1);
1404 }
1405 rw_args->bytes_moved = i;
1406 return RTEMS_SUCCESSFUL;
1407 }
1408
1409
1410
1411
1412
1413
1414 void _BSP_output_char(char c)
1415 {
1416 rtems_device_minor_number printk_minor;
1417
1418
1419
1420
1421
1422 if ( NVRAM_CONFIGURE )
1423
1424 printk_minor = (nvram->console_printk_port & 0x30) >> 4;
1425 else
1426 printk_minor = PRINTK_MINOR;
1427
1428 _167Bug_pollWrite(printk_minor, &c, 1);
1429 }
1430
1431
1432
1433
1434
1435
1436
1437
1438
1439
1440
1441
1442 rtems_device_driver console_initialize(
1443 rtems_device_major_number major,
1444 rtems_device_minor_number minor,
1445 void *arg
1446 )
1447 {
1448 rtems_status_code status;
1449 rtems_device_minor_number console_minor;
1450
1451
1452
1453
1454 if ( NVRAM_CONFIGURE ) {
1455
1456 console_minor = nvram->console_printk_port & 0x03;
1457
1458 if ( nvram->console_mode & 0x01 )
1459
1460 rtems_termios_initialize ();
1461 }
1462 else {
1463 console_minor = CONSOLE_MINOR;
1464 #if CD2401_USE_TERMIOS == 1
1465 rtems_termios_initialize ();
1466 #endif
1467 }
1468
1469
1470
1471
1472
1473 cd2401_initialize ();
1474
1475
1476
1477
1478 status = rtems_io_register_name ("/dev/tty0", major, 0);
1479 if (status != RTEMS_SUCCESSFUL)
1480 rtems_fatal_error_occurred (status);
1481
1482 status = rtems_io_register_name ("/dev/tty1", major, 1);
1483 if (status != RTEMS_SUCCESSFUL)
1484 rtems_fatal_error_occurred (status);
1485
1486 status = rtems_io_register_name ("/dev/console", major, console_minor);
1487 if (status != RTEMS_SUCCESSFUL)
1488 rtems_fatal_error_occurred (status);
1489
1490 status = rtems_io_register_name ("/dev/tty2", major, 2);
1491 if (status != RTEMS_SUCCESSFUL)
1492 rtems_fatal_error_occurred (status);
1493
1494 status = rtems_io_register_name ("/dev/tty3", major, 3);
1495 if (status != RTEMS_SUCCESSFUL)
1496 rtems_fatal_error_occurred (status);
1497
1498 return RTEMS_SUCCESSFUL;
1499 }
1500
1501
1502
1503
1504 rtems_device_driver console_open(
1505 rtems_device_major_number major,
1506 rtems_device_minor_number minor,
1507 void * arg
1508 )
1509 {
1510 static const rtems_termios_callbacks pollCallbacks = {
1511 NULL,
1512 NULL,
1513 _167Bug_pollRead,
1514 _167Bug_pollWrite,
1515 NULL,
1516 NULL,
1517 NULL,
1518 TERMIOS_POLLED
1519 };
1520
1521 static const rtems_termios_callbacks intrCallbacks = {
1522 cd2401_firstOpen,
1523 cd2401_lastClose,
1524 NULL,
1525 cd2401_write,
1526 cd2401_setAttributes,
1527 cd2401_stopRemoteTx,
1528 cd2401_startRemoteTx,
1529 TERMIOS_IRQ_DRIVEN
1530 };
1531
1532 if ( NVRAM_CONFIGURE )
1533
1534 if ( nvram->console_mode & 0x01 )
1535
1536 if ( nvram->console_mode & 0x02 )
1537
1538 return rtems_termios_open (major, minor, arg, &intrCallbacks);
1539 else
1540
1541 return rtems_termios_open (major, minor, arg, &pollCallbacks);
1542 else
1543
1544 return RTEMS_SUCCESSFUL;
1545 #if CD2401_USE_TERMIOS == 1
1546 #if CD2401_IO_MODE != 1
1547 else
1548
1549 return rtems_termios_open (major, minor, arg, &pollCallbacks);
1550 #else
1551 else
1552
1553 return rtems_termios_open (major, minor, arg, &intrCallbacks);
1554 #endif
1555 #else
1556 else
1557
1558 return RTEMS_SUCCESSFUL;
1559 #endif
1560 }
1561
1562
1563
1564
1565 rtems_device_driver console_close(
1566 rtems_device_major_number major,
1567 rtems_device_minor_number minor,
1568 void * arg
1569 )
1570 {
1571 if ( NVRAM_CONFIGURE ) {
1572
1573 if ( nvram->console_mode & 0x01 )
1574
1575 return rtems_termios_close (arg);
1576 else
1577
1578 return RTEMS_SUCCESSFUL;
1579 }
1580 #if CD2401_USE_TERMIOS == 1
1581 else
1582
1583 return rtems_termios_close (arg);
1584 #else
1585 else
1586
1587 return RTEMS_SUCCESSFUL;
1588 #endif
1589 }
1590
1591
1592
1593
1594 rtems_device_driver console_read(
1595 rtems_device_major_number major,
1596 rtems_device_minor_number minor,
1597 void * arg
1598 )
1599 {
1600 if ( NVRAM_CONFIGURE ) {
1601
1602 if ( nvram->console_mode & 0x01 )
1603
1604 return rtems_termios_read (arg);
1605 else
1606
1607 return do_poll_read (major, minor, arg);
1608 }
1609 #if CD2401_USE_TERMIOS == 1
1610 else
1611
1612 return rtems_termios_read (arg);
1613 #else
1614 else
1615
1616 return do_poll_read (major, minor, arg);
1617 #endif
1618 }
1619
1620
1621
1622
1623 rtems_device_driver console_write(
1624 rtems_device_major_number major,
1625 rtems_device_minor_number minor,
1626 void * arg
1627 )
1628 {
1629 if ( NVRAM_CONFIGURE ) {
1630
1631 if ( nvram->console_mode & 0x01 )
1632
1633 return rtems_termios_write (arg);
1634 else
1635
1636 return do_poll_write (major, minor, arg);
1637 }
1638 #if CD2401_USE_TERMIOS == 1
1639 else
1640
1641 return rtems_termios_write (arg);
1642 #else
1643 else
1644
1645 return do_poll_write (major, minor, arg);
1646 #endif
1647 }
1648
1649
1650
1651
1652 rtems_device_driver console_control(
1653 rtems_device_major_number major,
1654 rtems_device_minor_number minor,
1655 void * arg
1656 )
1657 {
1658 if ( NVRAM_CONFIGURE ) {
1659
1660 if ( nvram->console_mode & 0x01 )
1661
1662 return rtems_termios_ioctl (arg);
1663 else
1664
1665 return RTEMS_SUCCESSFUL;
1666 }
1667 #if CD2401_USE_TERMIOS == 1
1668 else
1669
1670 return rtems_termios_ioctl (arg);
1671 #else
1672 else
1673
1674 return RTEMS_SUCCESSFUL;
1675 #endif
1676 }