mvme147/clock/ckinit.c

0001 /* SPDX-License-Identifier: BSD-2-Clause */
0002
0003 /*
0004  *  This routine initializes the Tick Timer 2 on the MVME147 board.
0005  *  The tick frequency is 1 millisecond.
0006  */
0007
0008 /*
0009  *  COPYRIGHT (c) 1989-1999.
0010  *  On-Line Applications Research Corporation (OAR).
0011  *
0012  * Redistribution and use in source and binary forms, with or without
0013  * modification, are permitted provided that the following conditions
0014  * are met:
0015  * 1. Redistributions of source code must retain the above copyright
0016  *    notice, this list of conditions and the following disclaimer.
0017  * 2. Redistributions in binary form must reproduce the above copyright
0018  *    notice, this list of conditions and the following disclaimer in the
0019  *    documentation and/or other materials provided with the distribution.
0020  *
0021  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
0022  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
0023  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
0024  * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
0025  * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
0026  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
0027  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
0028  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
0029  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
0030  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
0031  * POSSIBILITY OF SUCH DAMAGE.
0032  *
0033  *  MVME147 port for TNI - Telecom Bretagne
0034  *  by Dominique LE CAMPION (Dominique.LECAMPION@enst-bretagne.fr)
0035  *  May 1996
0036  */
0037
0038 #include <stdlib.h>
0039
0040 #include <bsp.h>
0041 #include <rtems/clockdrv.h>
0042
0043 #define MS_COUNT          65376    /* 1ms */
0044 /* MS_COUNT = 0x10000 - 1e-3/6.25e-6 */
0045 #define CLOCK_INT_LEVEL   6               /* T2's interrupt level */
0046
0047 uint32_t         Clock_isrs;                  /* ISRs until next tick */
0048 volatile uint32_t         Clock_driver_ticks; /* ticks since initialization */
0049 rtems_isr_entry  Old_ticker;
0050
0051 static void Clock_exit( void );
0052
0053 /*
0054  *  ISR Handler
0055  */
0056 static rtems_isr Clock_isr(rtems_vector_number vector)
0057 {
0058   Clock_driver_ticks += 1;
0059   pcc->timer2_int_control |= 0x80; /* Acknowledge interr. */
0060
0061   if (Clock_isrs == 1) {
0062     rtems_clock_tick();
0063     Clock_isrs = rtems_configuration_get_microseconds_per_tick() / 1000;
0064   }
0065   else
0066     Clock_isrs -= 1;
0067 }
0068
0069 static void Install_clock(rtems_isr_entry clock_isr )
0070 {
0071
0072   Clock_driver_ticks = 0;
0073   Clock_isrs = rtems_configuration_get_microseconds_per_tick() / 1000;
0074
0075   Old_ticker = (rtems_isr_entry) set_vector( clock_isr, TIMER_2_VECTOR, 1 );
0076
0077   pcc->timer2_int_control = 0x00; /* Disable T2 Interr. */
0078   pcc->timer2_preload = MS_COUNT;
0079   /* write preload value */
0080   pcc->timer2_control = 0x07; /* clear T2 overflow counter, enable counter */
0081   pcc->timer2_int_control = CLOCK_INT_LEVEL|0x08;
0082   /* Enable Timer 2 and set its int. level */
0083
0084   atexit( Clock_exit );
0085 }
0086
0087 void Clock_exit( void )
0088 {
0089   pcc->timer2_int_control = 0x00; /* Disable T2 Interr. */
0090 }
0091
0092 void _Clock_Initialize( void )
0093 {
0094   Install_clock( Clock_isr );
0095 }