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File indexing completed on 2025-05-11 08:23:48
0001 /* SPDX-License-Identifier: BSD-2-Clause */ 0002 0003 /* 0004 * COPYRIGHT (c) 1989-1999. 0005 * On-Line Applications Research Corporation (OAR). 0006 * 0007 * Redistribution and use in source and binary forms, with or without 0008 * modification, are permitted provided that the following conditions 0009 * are met: 0010 * 1. Redistributions of source code must retain the above copyright 0011 * notice, this list of conditions and the following disclaimer. 0012 * 2. Redistributions in binary form must reproduce the above copyright 0013 * notice, this list of conditions and the following disclaimer in the 0014 * documentation and/or other materials provided with the distribution. 0015 * 0016 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 0017 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 0018 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 0019 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE 0020 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 0021 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 0022 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 0023 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 0024 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 0025 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 0026 * POSSIBILITY OF SUCH DAMAGE. 0027 * 0028 * MVME147 port for TNI - Telecom Bretagne 0029 * by Dominique LE CAMPION (Dominique.LECAMPION@enst-bretagne.fr) 0030 * May 1996 0031 */ 0032 0033 #include <rtems/btimer.h> 0034 #include <bsp.h> 0035 0036 #define TIMER_INT_LEVEL 6 0037 0038 #define COUNTDOWN_VALUE 0 0039 /* Allows 0.4096 second delay betwin ints */ 0040 /* Each tick is 6.25 us */ 0041 0042 int Ttimer_val; 0043 bool benchmark_timer_find_average_overhead; 0044 0045 rtems_isr timerisr(rtems_vector_number); 0046 0047 void benchmark_timer_initialize(void) 0048 { 0049 (void) set_vector(timerisr, TIMER_1_VECTOR, 0); /* install ISR */ 0050 0051 Ttimer_val = 0; /* clear timer ISR count */ 0052 pcc->timer1_int_control = 0x00; /* Disable T1 Interr. */ 0053 pcc->timer1_preload = COUNTDOWN_VALUE; 0054 /* write countdown preload value */ 0055 pcc->timer1_control = 0x00; /* load preload value */ 0056 pcc->timer1_control = 0x07; /* clear T1 overflow counter, enable counter */ 0057 pcc->timer1_int_control = TIMER_INT_LEVEL|0x08; 0058 /* Enable Timer 1 and set its int. level */ 0059 0060 } 0061 0062 #define AVG_OVERHEAD 0 /* No need to start/stop the timer to read 0063 its value on the MVME147 PCC: reads are not 0064 synchronized whith the counter updates*/ 0065 #define LEAST_VALID 10 /* Don't trust a value lower than this */ 0066 0067 benchmark_timer_t benchmark_timer_read(void) 0068 { 0069 uint32_t total; 0070 uint16_t counter_value; 0071 0072 counter_value = pcc->timer1_count; /* read the counter value */ 0073 0074 total = ((Ttimer_val * 0x10000) + counter_value); /* in 6.25 us units */ 0075 /* DC note : just look at the assembly generated 0076 to see gcc's impressive optimization ! */ 0077 return total; 0078 0079 } 0080 0081 void benchmark_timer_disable_subtracting_average_overhead( 0082 bool find_flag 0083 ) 0084 { 0085 benchmark_timer_find_average_overhead = find_flag; 0086 }
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