mrm332/start/start_c.c

0001 /**
0002  *  @file
0003  *
0004  *  MRM332 C Start Up Code
0005  */
0006
0007 /*
0008  *  COPYRIGHT (c) 2000.
0009  *  Matt Cross <profesor@gweep.net>
0010  *
0011  *  The license and distribution terms for this file may be
0012  *  found in the file LICENSE in this distribution or at
0013  *  http://www.rtems.org/license/LICENSE.
0014  *
0015  */
0016
0017 #include <bsp.h>
0018 #include <bsp/bootcard.h>
0019 #include <mrm332.h>
0020 #include <rtems/m68k/sim.h>
0021 #define __START_C__
0022
0023 /*
0024  *  This prototype really should have the noreturn attribute but
0025  *  that causes a warning. Not sure how to fix that.
0026  */
0027 /* void dumby_start ()  __attribute__ ((noreturn)); */
0028 void start_c(void);
0029
0030 void start_c(void) {
0031
0032 #ifdef SET_EDIV
0033 #define OPTIONAL_EDIV EDIV
0034 #else
0035 #define OPTIONAL_EDIV 0
0036 #endif
0037
0038     /* Synthesizer Control Register */
0039     /*    see section(s) 4.8 */
0040     /* end include in ram_init.S */
0041     *SYNCR = (unsigned short int) (SAM(MRM_W, 15, VCO) | SAM(0x0, 14, PRESCALE)
0042             | SAM(MRM_Y, 8, COUNTER) | OPTIONAL_EDIV);
0043     while (!(*SYNCR & SLOCK))
0044         ; /* protect from clock overshoot */
0045     /* include in ram_init.S */
0046     *SYNCR = (unsigned short int) (SAM(MRM_W, 15, VCO) | SAM(MRM_X, 14,
0047             PRESCALE) | SAM(MRM_Y, 8, COUNTER) | OPTIONAL_EDIV);
0048
0049     /* System Protection Control Register */
0050     /*    !!! can only write to once after reset !!! */
0051     /*    see section 3.8.4 of the SIM Reference Manual */
0052     *SYPCR = (unsigned char) (HME | BME);
0053
0054     /* Periodic Interrupr Control Register */
0055     /*    see section 3.8.2 of the SIM Reference Manual */
0056     *PICR = (unsigned short int) (SAM(0, 8, PIRQL) | SAM(MRM_PIV, 0, PIV));
0057     /*     ^^^ zero disables interrupt, don't enable here or ram_init will
0058      be wrong. It's enabled below. */
0059
0060     /* Periodic Interrupt Timer Register */
0061     /*    see section 3.8.3 of the SIM Reference Manual */
0062     *PITR = (unsigned short int) (SAM(0x09, 0, PITM));
0063     /*    1.098mS interrupt, assuming 32.768 KHz input clock */
0064
0065     /* Port C Data */
0066     /*    load values before enabled */
0067     *PORTC = (unsigned char) 0x0;
0068
0069     /* Port E and F Data Register */
0070     /*    see section 9 of the SIM Reference Manual */
0071     *PORTE0 = (unsigned char) 0;
0072     *PORTF0 = (unsigned char) 0;
0073
0074     /* Port E and F Data Direction Register */
0075     /*    see section 9 of the SIM Reference Manual */
0076     *DDRE = (unsigned char) 0xff;
0077     *DDRF = (unsigned char) 0xfd;
0078
0079     /* Port E and F Pin Assignment Register. Set up Port E and F as I/O */
0080     /*    see section 9 of the SIM Reference Manual */
0081     *PEPAR = (unsigned char) 0;
0082     *PFPAR = (unsigned char) 0;
0083
0084     /* end of SIM initalization code */
0085     /* end include in ram_init.S */
0086
0087     /*
0088      * Initialize RAM by copying the .data section out of ROM (if
0089      * needed) and "zero-ing" the .bss section.
0090      */
0091     {
0092         register char *src = _etext;
0093         register char *dst = _copy_start;
0094
0095         if (_copy_data_from_rom) {
0096             /* ROM has data at end of text; copy it. */
0097             while (dst < _edata)
0098                 *dst++ = *src++;
0099         }
0100         /* Zero bss */
0101         for (dst = _clear_start; dst < end; dst++) {
0102             *dst = 0;
0103         }
0104     }
0105
0106     /*
0107      * Initialize vector table.
0108      */
0109     {
0110         rtems_isr_entry *monitors_vector_table;
0111
0112         m68k_get_vbr(monitors_vector_table);
0113
0114         M68Kvec[4] = monitors_vector_table[4]; /* breakpoints vector */
0115         M68Kvec[9] = monitors_vector_table[9]; /* trace vector */
0116         M68Kvec[31] = monitors_vector_table[31]; /* level 7 interrupt */
0117         M68Kvec[47] = monitors_vector_table[47]; /* system call vector */
0118         M68Kvec[66] = monitors_vector_table[66]; /* user defined */
0119
0120         m68k_set_vbr(&M68Kvec);
0121     }
0122
0123
0124   /*
0125    * Execute main with arguments argc and agrv.
0126    */
0127   boot_card((void*)0);
0128   reboot();
0129
0130 }