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File indexing completed on 2025-05-11 08:23:47
0001 /** 0002 * @file 0003 * 0004 * MRM332 Assembly Start Up Code 0005 */ 0006 0007 /* 0008 * COPYRIGHT (c) 2000. 0009 * Matt Cross <profesor@gweep.net> 0010 * 0011 * The license and distribution terms for this file may be 0012 * found in the file LICENSE in this distribution or at 0013 * http://www.rtems.org/license/LICENSE. 0014 * 0015 */ 0016 0017 #include "mrm332.h" 0018 #include <rtems/asm.h> 0019 #include <rtems/m68k/sim.h> 0020 0021 BEGIN_CODE 0022 0023 /* Put the header necessary for the modified CPU32bug to automatically 0024 start up rtems: */ 0025 #if 1 0026 .long 0xbeefbeef ; 0027 #endif 0028 .long 0 ; 0029 .long start ; 0030 0031 .global start 0032 start: 0033 0034 oriw #0x0700,sr /* Mask off interupts */ 0035 0036 // Set VBR to CPU32Bug vector table address 0037 movel #0x0,d0 /* Use the initial vectors until we get going */ 0038 movecl d0,vbr 0039 0040 /* Set stack pointer */ 0041 movel #_ISR_Stack_area_end,d0 0042 movel d0,sp 0043 movel d0,a6 0044 0045 /* include in ram_init.S */ 0046 /* 0047 * Initalize the SIM module. 0048 * The stack pointer is not usable until the RAM chip select lines 0049 * are configured. The following code must remain inline. 0050 */ 0051 0052 /* Module Configuration Register */ 0053 /* see section(s) 3.1.3-3.1.6 of the SIM Reference Manual */ 0054 /* SIMCR etc and SAM macro all defined in sim.h found at */ 0055 /* /cpukit/score/cpu/m68k/rtems/m68k/sim.h */ 0056 /* The code below does the following: */ 0057 /* - Sets Freeze Software Enable */ 0058 /* - Turns off Show Cycle Enable */ 0059 /* - Sets the location of SIM module mapping */ 0060 /* - Sets the SIM Interrupt Arbitration Field */ 0061 lea SIMCR, a0 0062 movew #FRZSW,d0 0063 oriw #SAM(0,8,SHEN),d0 0064 oriw #(MM*SIM_MM),d0 0065 oriw #SAM(SIM_IARB,0,IARB),d0 0066 movew d0, a0@ 0067 0068 jsr start_c /* Jump to the C startup code */ 0069 0070 END_CODE 0071
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