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File indexing completed on 2025-05-11 08:23:47

0001 /*  mrm332.h
0002  */
0003 
0004 #ifndef _MRM332_H_
0005 #define _MRM332_H_
0006 
0007 /* SIM_MM (SIM Module Mapping) determines the location of the control
0008    register block. When MM=0, register addresses range fom 0x7ff000 to
0009    0x7FFFFF. When MM=1, register addresses range from 0xfff000 to
0010    0xffffff. */
0011 #define SIM_MM 1
0012 
0013 /* Interrupt related definitions */
0014 #define SIM_IARB 15
0015 #define QSM_IARB 10
0016 
0017 #define MRM_PIV 64
0018 #define ISRL_PIT 4      /* zero disables PIT */
0019 
0020 #define EFI_QIVR 66     /* 66=>SCI and 67=>QSPI interrupt */
0021 #define ISRL_QSPI 0
0022 
0023 #define EFI_SPINT 24        /* spurious interrupt */
0024 #define EFI_INT1 25     /* CTS interrupt */
0025 #define ISRL_SCI 6
0026 
0027 /* System Clock definitions */
0028 #define XTAL 32768.0        /* crystal frequency in Hz */
0029 
0030 /* Specify the CPU frequency. Do not specify a faster clock than your */
0031 /* CPU is rated for! */
0032 #if 0
0033 /* Default MRM clock rate (8.388688 MHz) set by CPU32: */
0034 #define MRM_W 0         /* system clock parameters */
0035 #define MRM_X 0
0036 #define MRM_Y 0x3f
0037 #endif
0038 
0039 #if 0
0040 /* 16.77722 MHz: */
0041 #define MRM_W 1         /* system clock parameters */
0042 #define MRM_X 1
0043 #define MRM_Y 0x0f
0044 #endif
0045 
0046 #if 1
0047 /* 25.16582 MHz: */
0048 #define MRM_W 1         /* system clock parameters */
0049 #define MRM_X 1
0050 #define MRM_Y 0x17
0051 #define SET_EDIV
0052 #endif
0053 
0054 #define SYS_CLOCK (XTAL*4.0*(MRM_Y+1)*(1 << (2*MRM_W+MRM_X)))
0055 #define SCI_BAUD 19200      /* RS232 Baud Rate */
0056 
0057 /* macros/functions */
0058 
0059 #ifndef ASM
0060 
0061 /*
0062  *  This prototype really should have the noreturn attribute but
0063  *  that causes a warning. Not sure how to fix that.
0064  */
0065 /*   static void reboot(void) __attribute__ ((noreturn)); */
0066 static void reboot(void);
0067 __inline__ static void reboot() {__asm__ ("trap #15; .word 0x0063");}
0068 
0069 #endif /* ASM */
0070 
0071 #endif /* _MRM_H_ */