mcf5235/start/init5235.c

0001 /*
0002  *  This is where the real hardware setup is done. A minimal stack
0003  *  has been provided by the start.S code. No normal C or RTEMS
0004  *  functions can be called from here.
0005  *
0006  * This routine is pretty simple for the uC5235 because all the hard
0007  * work has been done by the bootstrap dBUG code.
0008  */
0009
0010 #include <rtems.h>
0011 #include <bsp.h>
0012
0013 #define MM_SDRAM_BASE       (0x00000000)
0014
0015 /*
0016  * MCF5235_BSP_START_FROM_FLASH comes from the linker script
0017  * If it is set to 0 then it is assumed that the motorola debug monitor
0018  * is present and we do not need to re-initialize the SDRAM. Otherwise,
0019  * if it is set to 1 then we want to boot our own code from flash and we
0020  * do need to initialize the SDRAM.
0021  */
0022
0023 extern uint32_t MCF5235_BSP_START_FROM_FLASH;
0024 extern void CopyDataClearBSSAndStart (void);
0025 extern void INTERRUPT_VECTOR(void);
0026
0027 extern void CopyVectors(const uint32_t* old, uint32_t* new);
0028
0029 void Init5235 (void)
0030 {
0031     int x;
0032     volatile int temp = 0;
0033     int *address_of_MCF5235_BSP_START_FROM_FLASH;
0034
0035     /*Setup the GPIO Registers */
0036     MCF5235_GPIO_UART=0x3FFF;
0037     MCF5235_GPIO_PAR_AD=0xE1;
0038
0039     /*Setup the Chip Selects so CS0 is flash */
0040     MCF5235_CS_CSAR0 =(0xFFE00000 & 0xffff0000)>>16;
0041     MCF5235_CS_CSMR0 = 0x001f0001;
0042     MCF5235_CS_CSCR0 = 0x1980;
0043
0044     address_of_MCF5235_BSP_START_FROM_FLASH = (int *) & MCF5235_BSP_START_FROM_FLASH;
0045     if ( (int)address_of_MCF5235_BSP_START_FROM_FLASH == 1) {
0046         /*Setup the SDRAM  */
0047         for(x=0; x<20000; x++)
0048         {
0049            temp +=1;
0050         }
0051         MCF5235_SDRAMC_DCR  = 0x042E;
0052         MCF5235_SDRAMC_DACR0 = 0x00001300;
0053         MCF5235_SDRAMC_DMR0 = (0x00FC0000) | (0x00000001);
0054         for(x=0; x<20000; x++)
0055         {
0056             temp +=1;
0057         }
0058         /* set ip ( bit 3 ) in dacr */
0059         MCF5235_SDRAMC_DACR0 |= (0x00000008) ;
0060         /* init precharge */
0061         *((unsigned long *)MM_SDRAM_BASE) = 0xDEADBEEF;
0062         /* set RE in dacr */
0063         MCF5235_SDRAMC_DACR0 |= (0x00008000);
0064         /* wait */
0065         for(x=0; x<20000; x++)
0066         {
0067             temp +=1;
0068         }
0069         /* issue IMRS */
0070         MCF5235_SDRAMC_DACR0 |= (0x00000040);
0071         *((short *)MM_SDRAM_BASE) = 0;
0072         for(x=0; x<60000; x++)
0073         {
0074             temp +=1;
0075         }
0076         *((unsigned long*)MM_SDRAM_BASE)=0x12345678;
0077     } /* we have finished setting up the sdram */
0078
0079     /* Copy the interrupt vector table to address 0x0 in SDRAM */
0080     CopyVectors((const uint32_t *)&INTERRUPT_VECTOR, (uint32_t*)0);
0081
0082     m68k_set_vbr(0);
0083
0084     /*
0085      * Copy data, clear BSS and call boot_card()
0086      */
0087     CopyDataClearBSSAndStart ();
0088
0089 }