Back to home page

LXR
 
 

    

File indexing completed on 2025-05-11 08:23:47 

0001 /* SPDX-License-Identifier: BSD-2-Clause */
0002 
0003 /*
0004  *  dpu-mcf52258 startup code
0005  *
0006  *  This file contains the entry point for the application.
0007  *  The name of this entry point is compiler dependent.
0008  *  It jumps to the BSP which is responsible for performing
0009  *  all initialization.
0010  *
0011  *  COPYRIGHT (c) 1989-1998.
0012  *  On-Line Applications Research Corporation (OAR).
0013  *
0014  * Redistribution and use in source and binary forms, with or without
0015  * modification, are permitted provided that the following conditions
0016  * are met:
0017  * 1. Redistributions of source code must retain the above copyright
0018  *    notice, this list of conditions and the following disclaimer.
0019  * 2. Redistributions in binary form must reproduce the above copyright
0020  *    notice, this list of conditions and the following disclaimer in the
0021  *    documentation and/or other materials provided with the distribution.
0022  *
0023  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
0024  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
0025  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
0026  * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
0027  * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
0028  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
0029  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
0030  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
0031  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
0032  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
0033  * POSSIBILITY OF SUCH DAMAGE.
0034  */
0035 
0036 #include <rtems/asm.h>
0037 
0038 BEGIN_CODE
0039     
0040     PUBLIC (_INTERRUPT_VECTOR)
0041 SYM(_INTERRUPT_VECTOR):
0042 
0043     .long   _ISR_Stack_area_end /* 00 Initial 'SSP' */
0044     .long   SYM(start) /* 01 Initial PC */
0045     .long   SYM(_uhoh) /* 02 Access Error */
0046     .long   SYM(_uhoh) /* 03 Address Error */
0047     .long   SYM(_uhoh) /* 04 Illegal Instruction */
0048     .long   SYM(_uhoh) /* 05 Divide by Zero */
0049     .long   SYM(_uhoh) /* 06 Reserved */
0050     .long   SYM(_uhoh) /* 07 Reserved */
0051     .long   SYM(_uhoh) /* 08 Privilege Violation */
0052     .long   SYM(_uhoh) /* 09 Trace */
0053     .long   SYM(_uhoh) /* 10 Unimplemented A-Line */
0054     .long   SYM(_uhoh) /* 11 Unimplemented F-Line */
0055     .long   SYM(_uhoh) /* 12 Debug Interrupt */
0056     .long   SYM(_uhoh) /* 13 Reserved */
0057     .long   SYM(_uhoh) /* 14 Format Error */
0058     .long   SYM(_uhoh) /* 15 Reserved */
0059     .long   SYM(_uhoh) /* 16 Reserved */
0060     .long   SYM(_uhoh) /* 17 Reserved */
0061     .long   SYM(_uhoh) /* 18 Reserved */
0062     .long   SYM(_uhoh) /* 19 Reserved */
0063     .long   SYM(_uhoh) /* 20 Reserved */
0064     .long   SYM(_uhoh) /* 21 Reserved */
0065     .long   SYM(_uhoh) /* 22 Reserved */
0066     .long   SYM(_uhoh) /* 23 Reserved */
0067     .long   SYM(_spuriousInterrupt) /* 24 Spurious Interrupt */
0068     .long   SYM(_uhoh) /* 25 Reserved */
0069     .long   SYM(_uhoh) /* 26 Reserved */
0070     .long   SYM(_uhoh) /* 27 Reserved */
0071     .long   SYM(_uhoh) /* 28 Reserved */
0072     .long   SYM(_uhoh) /* 29 Reserved */
0073     .long   SYM(_uhoh) /* 30 Reserved */
0074     .long   SYM(_uhoh) /* 31 Reserved */
0075     .long   SYM(_uhoh) /* 32 TRAP #0 */
0076     .long   SYM(_uhoh) /* 33 TRAP #1 */
0077     .long   SYM(_uhoh) /* 34 TRAP #2 */
0078     .long   SYM(_uhoh) /* 35 TRAP #3 */
0079     .long   SYM(_uhoh) /* 36 TRAP #4 */
0080     .long   SYM(_uhoh) /* 37 TRAP #5 */
0081     .long   SYM(_uhoh) /* 38 TRAP #6 */
0082     .long   SYM(_uhoh) /* 39 TRAP #7 */
0083     .long   SYM(_uhoh) /* 40 TRAP #8 */
0084     .long   SYM(_uhoh) /* 41 TRAP #9 */
0085     .long   SYM(_uhoh) /* 42 TRAP #10 */
0086     .long   SYM(_uhoh) /* 43 TRAP #11 */
0087     .long   SYM(_uhoh) /* 44 TRAP #12 */
0088     .long   SYM(_uhoh) /* 45 TRAP #13 */
0089     .long   SYM(_uhoh) /* 46 TRAP #14 */
0090     .long   SYM(_uhoh) /* 47 TRAP #15 */
0091     .long   SYM(_uhoh) /* 48 Reserved */
0092     .long   SYM(_uhoh) /* 49 Reserved */
0093     .long   SYM(_uhoh) /* 50 Reserved */
0094     .long   SYM(_uhoh) /* 51 Reserved */
0095     .long   SYM(_uhoh) /* 52 Reserved */
0096     .long   SYM(_uhoh) /* 53 Reserved */
0097     .long   SYM(_uhoh) /* 54 Reserved */
0098     .long   SYM(_uhoh) /* 55 Reserved */
0099     .long   SYM(_uhoh) /* 56 Reserved */
0100     .long   SYM(_uhoh) /* 57 Reserved */
0101     .long   SYM(_uhoh) /* 58 Reserved */
0102     .long   SYM(_uhoh) /* 59 Reserved */
0103     .long   SYM(_uhoh) /* 60 Reserved */
0104     .long   SYM(_uhoh) /* 61 Reserved */
0105     .long   SYM(_uhoh) /* 62 Reserved */
0106     .long   SYM(_uhoh) /* 63 Reserved */
0107 
0108     /* INTC0 */
0109 
0110     .long   SYM(_uhoh) /* 64*/
0111     .long   SYM(_uhoh) /* 65*/
0112     .long   SYM(_uhoh) /* 66*/
0113     .long   SYM(_uhoh) /* 67*/
0114     .long   SYM(_uhoh) /* 68*/
0115     .long   SYM(_uhoh) /* 69*/
0116     .long   SYM(_uhoh) /* 70*/
0117     .long   SYM(_uhoh) /* 71*/
0118     .long   SYM(_uhoh) /* 72*/
0119     .long   SYM(_uhoh) /* 73*/
0120     .long   SYM(_uhoh) /* 74*/
0121     .long   SYM(_uhoh) /* 75*/
0122     .long   SYM(_uhoh) /* 76*/
0123     .long   SYM(_uhoh) /* 77*/
0124     .long   SYM(_uhoh) /* 78*/
0125     .long   SYM(_uhoh) /* 79*/
0126     .long   SYM(_uhoh) /* 80*/
0127     .long   SYM(_uhoh) /* 81*/
0128     .long   SYM(_uhoh) /* 82*/
0129     .long   SYM(_uhoh) /* 83*/
0130     .long   SYM(_uhoh) /* 84*/
0131     .long   SYM(_uhoh) /* 85*/
0132     .long   SYM(_uhoh) /* 86*/
0133     .long   SYM(_uhoh) /* 87*/
0134     .long   SYM(_uhoh) /* 88*/
0135     .long   SYM(_uhoh) /* 89*/
0136     .long   SYM(_uhoh) /* 90*/
0137     .long   SYM(_uhoh) /* 91*/
0138     .long   SYM(_uhoh) /* 92*/
0139     .long   SYM(_uhoh) /* 93*/
0140     .long   SYM(_uhoh) /* 94*/
0141     .long   SYM(_uhoh) /* 95*/
0142     .long   SYM(_uhoh) /* 96*/
0143     .long   SYM(_uhoh) /* 97*/
0144     .long   SYM(_uhoh) /* 98*/
0145     .long   SYM(_uhoh) /* 99*/
0146     .long   SYM(_uhoh) /* 100*/
0147     .long   SYM(_uhoh) /* 101*/
0148     .long   SYM(_uhoh) /* 102*/
0149     .long   SYM(_uhoh) /* 103*/
0150     .long   SYM(_uhoh) /* 104*/
0151     .long   SYM(_uhoh) /* 105*/
0152     .long   SYM(_uhoh) /* 106*/
0153     .long   SYM(_uhoh) /* 107*/
0154     .long   SYM(_uhoh) /* 108*/
0155     .long   SYM(_uhoh) /* 109*/
0156     .long   SYM(_uhoh) /* 110*/
0157     .long   SYM(_uhoh) /* 111*/
0158     .long   SYM(_uhoh) /* 112*/
0159     .long   SYM(_uhoh) /* 113*/
0160     .long   SYM(_uhoh) /* 114*/
0161     .long   SYM(_uhoh) /* 115*/
0162     .long   SYM(_uhoh) /* 116*/
0163     .long   SYM(_uhoh) /* 117*/
0164     .long   SYM(_uhoh) /* 118*/
0165     .long   SYM(_uhoh) /* 119*/
0166     .long   SYM(_uhoh) /* 120*/
0167     .long   SYM(_uhoh) /* 121*/
0168     .long   SYM(_uhoh) /* 122*/
0169     .long   SYM(_uhoh) /* 123*/
0170     .long   SYM(_uhoh) /* 124*/
0171     .long   SYM(_uhoh) /* 125*/
0172     .long   SYM(_uhoh) /* 126*/
0173     .long   SYM(_uhoh) /* 127*/
0174 
0175     /* INTC1 */
0176 
0177     .long   SYM(_uhoh) /* 128*/
0178     .long   SYM(_uhoh) /* 129*/
0179     .long   SYM(_uhoh) /* 130*/
0180     .long   SYM(_uhoh) /* 131*/
0181     .long   SYM(_uhoh) /* 132*/
0182     .long   SYM(_uhoh) /* 133*/
0183     .long   SYM(_uhoh) /* 134*/
0184     .long   SYM(_uhoh) /* 135*/
0185     .long   SYM(_uhoh) /* 136*/
0186     .long   SYM(_uhoh) /* 137*/
0187     .long   SYM(_uhoh) /* 138*/
0188     .long   SYM(_uhoh) /* 139*/
0189     .long   SYM(_uhoh) /* 140*/
0190     .long   SYM(_uhoh) /* 141*/
0191     .long   SYM(_uhoh) /* 142*/
0192     .long   SYM(_uhoh) /* 143*/
0193     .long   SYM(_uhoh) /* 144*/
0194     .long   SYM(_uhoh) /* 145*/
0195     .long   SYM(_uhoh) /* 146*/
0196     .long   SYM(_uhoh) /* 147*/
0197     .long   SYM(_uhoh) /* 148*/
0198     .long   SYM(_uhoh) /* 149*/
0199     .long   SYM(_uhoh) /* 150*/
0200     .long   SYM(_uhoh) /* 151*/
0201     .long   SYM(_uhoh) /* 152*/
0202     .long   SYM(_uhoh) /* 153*/
0203     .long   SYM(_uhoh) /* 154*/
0204     .long   SYM(_uhoh) /* 155*/
0205     .long   SYM(_uhoh) /* 156*/
0206     .long   SYM(_uhoh) /* 157*/
0207     .long   SYM(_uhoh) /* 158*/
0208     .long   SYM(_uhoh) /* 159*/
0209     .long   SYM(_uhoh) /* 160*/
0210     .long   SYM(_uhoh) /* 161*/
0211     .long   SYM(_uhoh) /* 162*/
0212     .long   SYM(_uhoh) /* 163*/
0213     .long   SYM(_uhoh) /* 164*/
0214     .long   SYM(_uhoh) /* 165*/
0215     .long   SYM(_uhoh) /* 166*/
0216     .long   SYM(_uhoh) /* 167*/
0217     .long   SYM(_uhoh) /* 168*/
0218     .long   SYM(_uhoh) /* 169*/
0219     .long   SYM(_uhoh) /* 170*/
0220     .long   SYM(_uhoh) /* 171*/
0221     .long   SYM(_uhoh) /* 172*/
0222     .long   SYM(_uhoh) /* 173*/
0223     .long   SYM(_uhoh) /* 174*/
0224     .long   SYM(_uhoh) /* 175*/
0225     .long   SYM(_uhoh) /* 176*/
0226     .long   SYM(_uhoh) /* 177*/
0227     .long   SYM(_uhoh) /* 178*/
0228     .long   SYM(_uhoh) /* 179*/
0229     .long   SYM(_uhoh) /* 180*/
0230     .long   SYM(_uhoh) /* 181*/
0231     .long   SYM(_uhoh) /* 182*/
0232     .long   SYM(_uhoh) /* 183*/
0233     .long   SYM(_uhoh) /* 184*/
0234     .long   SYM(_uhoh) /* 185*/
0235     .long   SYM(_uhoh) /* 186*/
0236     .long   SYM(_uhoh) /* 187*/
0237     .long   SYM(_uhoh) /* 188*/
0238     .long   SYM(_uhoh) /* 189*/
0239     .long   SYM(_uhoh) /* 190*/
0240     .long   SYM(_uhoh) /* 191*/
0241     .long   SYM(_uhoh) /* 192*/
0242 
0243     /* */
0244 
0245     .long   SYM(_uhoh) /* 193*/
0246     .long   SYM(_uhoh) /* 194*/
0247     .long   SYM(_uhoh) /* 195*/
0248     .long   SYM(_uhoh) /* 196*/
0249     .long   SYM(_uhoh) /* 197*/
0250     .long   SYM(_uhoh) /* 198*/
0251     .long   SYM(_uhoh) /* 199*/
0252     .long   SYM(_uhoh) /* 200*/
0253     .long   SYM(_uhoh) /* 201*/
0254     .long   SYM(_uhoh) /* 202*/
0255     .long   SYM(_uhoh) /* 203*/
0256     .long   SYM(_uhoh) /* 204*/
0257     .long   SYM(_uhoh) /* 205*/
0258     .long   SYM(_uhoh) /* 206*/
0259     .long   SYM(_uhoh) /* 207*/
0260     .long   SYM(_uhoh) /* 208*/
0261     .long   SYM(_uhoh) /* 209*/
0262     .long   SYM(_uhoh) /* 210*/
0263     .long   SYM(_uhoh) /* 211*/
0264     .long   SYM(_uhoh) /* 212*/
0265     .long   SYM(_uhoh) /* 213*/
0266     .long   SYM(_uhoh) /* 214*/
0267     .long   SYM(_uhoh) /* 215*/
0268     .long   SYM(_uhoh) /* 216*/
0269     .long   SYM(_uhoh) /* 217*/
0270     .long   SYM(_uhoh) /* 218*/
0271     .long   SYM(_uhoh) /* 219*/
0272     .long   SYM(_uhoh) /* 220*/
0273     .long   SYM(_uhoh) /* 221*/
0274     .long   SYM(_uhoh) /* 222*/
0275     .long   SYM(_uhoh) /* 223*/
0276     .long   SYM(_uhoh) /* 224*/
0277     .long   SYM(_uhoh) /* 225*/
0278     .long   SYM(_uhoh) /* 226*/
0279     .long   SYM(_uhoh) /* 227*/
0280     .long   SYM(_uhoh) /* 228*/
0281     .long   SYM(_uhoh) /* 229*/
0282     .long   SYM(_uhoh) /* 230*/
0283     .long   SYM(_uhoh) /* 231*/
0284     .long   SYM(_uhoh) /* 232*/
0285     .long   SYM(_uhoh) /* 233*/
0286     .long   SYM(_uhoh) /* 234*/
0287     .long   SYM(_uhoh) /* 235*/
0288     .long   SYM(_uhoh) /* 236*/
0289     .long   SYM(_uhoh) /* 237*/
0290     .long   SYM(_uhoh) /* 238*/
0291     .long   SYM(_uhoh) /* 239*/
0292     .long   SYM(_uhoh) /* 240*/
0293     .long   SYM(_uhoh) /* 241*/
0294     .long   SYM(_uhoh) /* 242*/
0295     .long   SYM(_uhoh) /* 243*/
0296     .long   SYM(_uhoh) /* 244*/
0297     .long   SYM(_uhoh) /* 245*/
0298     .long   SYM(_uhoh) /* 246*/
0299     .long   SYM(_uhoh) /* 247*/
0300     .long   SYM(_uhoh) /* 248*/
0301     .long   SYM(_uhoh) /* 249*/
0302     .long   SYM(_uhoh) /* 250*/
0303     .long   SYM(_uhoh) /* 251*/
0304     .long   SYM(_uhoh) /* 252*/
0305     .long   SYM(_uhoh) /* 253*/
0306     .long   SYM(_uhoh) /* 254*/
0307     .long   SYM(_uhoh) /* 255*/
0308 
0309 /*
0310  * We must write the flash configuration here.
0311      This portion of RAM is shadowed
0312  * by some flash registers, so we can't put code here!
0313  */
0314 
0315     PUBLIC (_FLASH_CONFIGURATION_FIELD)
0316 SYM(_FLASH_CONFIGURATION_FIELD):
0317 
0318 _key_upper: .long   0x5a5a5a5a
0319 _key_lower: .long   0x5a5a5a5a
0320 _cfm_prot:  .long   0x00000000
0321 _cfm_sacc:  .long   0x00000000
0322 _cfm_dacc:  .long   0x00000000
0323 _cfm_msec:  .long   0x80000000      //enable the KEYEN bit to bypass security in backdoor mode
0324 
0325 /*
0326  * Default trap handler
0327  * With an oscilloscope you can see AS* stop
0328  */
0329 .align 4
0330     PUBLIC (_uhoh)
0331 SYM(_uhoh): 
0332     nop                     | Leave spot for breakpoint
0333     stop    #0x2700         | Stop with interrupts disabled 
0334     bra.w   SYM(_uhoh)      | Stuck forever
0335 
0336 /* 
0337  * Spurious Interrupt Handler
0338  */
0339 .align 4
0340     PUBLIC (_spuriousInterrupt)
0341 SYM(_spuriousInterrupt):
0342     addql   #1, SYM(_M68kSpuriousInterruptCount)
0343     rte
0344 
0345 /* 
0346  * Write VBR Register
0347  */
0348 
0349 /*
0350 .align 4
0351     PUBLIC (_wr_vbr)
0352 SYM(_wr_vbr):
0353     move.l  4(sp), d0
0354     movec   d0, vbr 
0355     nop
0356     rts 
0357 */
0358 
0359 /* 
0360  * Board startup
0361  * Disable watchdog, interrupts
0362  * Enable sram
0363  */
0364 .align 4
0365     PUBLIC (start)
0366 SYM(start):
0367 
0368     /* Mask off interupts */
0369     move.w   #0x2700, sr
0370 
0371         /* Save off intial D0 and D1 to NOT scratched registers conforming to ABI C calling convention */
0372         move.l  d0,d5;
0373         move.l  d1,d6;
0374 
0375     /* Initialize RAMBAR: locate SRAM and validate it */
0376     move.l  #RamBase, d7
0377     add.l   #0x21, d7
0378     movec   d7, %rambar
0379 
0380     /* Locate Stack Pointer */ 
0381     move.l  #_ISR_Stack_area_end, sp
0382 
0383     /* Initialize FLASHBAR */
0384     move.l  #_FlashBase, d7
0385     cmp.l   #0x00000000, d7
0386     bne     _change_flashbar
0387     add.l   #0x61, d7
0388     movec   d7, %flashbar
0389 
0390 _continue_startup:
0391 
0392     /* Locate Stack Pointer */ 
0393 //    move.l  #_ISR_Stack_area_end, sp      //is done automatically by the CPU
0394 
0395     /*
0396      * Remainder of the startup code is handled by C code
0397      * This never returns
0398      */
0399     
0400     jmp SYM(Init5225x)
0401 
0402 _change_flashbar:
0403     /* 
0404     * The following sequence is used to set FLASHBAR. Since we may 
0405     * be executing from Flash, we must put the routine into SRAM for
0406     * execution and then jump back to Flash using the new address.
0407     *
0408     * The following instructions are coded into the SRAM:
0409     *
0410     * move.l    #(__FLASH + 0x61),d0
0411     * movec    d0, FLASHBAR
0412     * jmp        _continue_startup
0413     *
0414     * An arbitrary SRAM address is chosen until the real address
0415     * can be loaded.
0416     *
0417     * This routine is not necessary if the default Flash address
0418     * (0x00000000) is used.
0419     *
0420     * If running in SRAM, change_flashbar should not be executed 
0421     */
0422 
0423     move.l  #RamBase, a0
0424 
0425     /* Code "move.l #(__FLASH + 0x61),d0" into SRAM */
0426     move.w  #0x203C, d0
0427     move.w  d0, (a0)+
0428     move.l  #_FlashBase, d0
0429     add.l   #0x61, d0
0430     move.l  d0, (a0)+
0431 
0432     /* Code "movec d0,FLASHBAR" into SRAM */
0433     move.l  #0x4e7b0C04, d0
0434     move.l  d0, (a0)+
0435 
0436     /* Code "jmp _continue_startup" into SRAM */
0437     move.w  #0x4EF9, d0
0438     move.w  d0, (a0)+
0439     move.l  #_continue_startup, d0
0440     move.l  d0, (a0)+
0441 
0442     /* Jump to code segment in internal SRAM */
0443     jmp     RamBase
0444 
0445 END_CODE
0446 
0447 
0448 BEGIN_DATA_DCL
0449 
0450     .align 4
0451 
0452 PUBLIC (_M68kSpuriousInterruptCount)
0453 SYM (_M68kSpuriousInterruptCount):
0454     .long   0
0455 
0456 PUBLIC (_d0_reset)
0457 SYM (_d0_reset):
0458     .long   0
0459 
0460 PUBLIC (_d1_reset)
0461 SYM (_d1_reset):
0462     .long   0
0463 
0464 END_DATA_DCL
0465 
0466 END
0467
[ Source navigation ] [ Diff markup ] [ Identifier search ] [ general search ]

This page was automatically generated by the 2.3.7 LXR engine.

The LXR team
Valid CSS 2.1! Valid HTML 4.01!