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0001 /* SPDX-License-Identifier: BSD-2-Clause */
0002 
0003 /**
0004  * @file
0005  *
0006  * @ingroup RTEMSBSPsM68kGenMCF548X
0007  *
0008  * @brief Global BSP definitions.
0009  */
0010 
0011 /*
0012  * RTEMS generic mcf548x BSP
0013  *
0014  * The file contains the BSP header of generic MCF548x BSP.
0015  *
0016  * Parts of the code has been derived from the "dBUG source code"
0017  * package Freescale is providing for M548X EVBs. The usage of
0018  * the modified or unmodified code and it's integration into the
0019  * generic mcf548x BSP has been done according to the Freescale
0020  * license terms.
0021  *
0022  * The Freescale license terms can be reviewed in the file
0023  *
0024  *    LICENSE.Freescale
0025  *
0026  * The generic mcf548x BSP has been developed on the basic
0027  * structures and modules of the av5282 BSP.
0028  */
0029 
0030 /*
0031  * Copyright (c) 2007 embedded brains GmbH & Co. KG
0032  *
0033  * Redistribution and use in source and binary forms, with or without
0034  * modification, are permitted provided that the following conditions
0035  * are met:
0036  * 1. Redistributions of source code must retain the above copyright
0037  *    notice, this list of conditions and the following disclaimer.
0038  * 2. Redistributions in binary form must reproduce the above copyright
0039  *    notice, this list of conditions and the following disclaimer in the
0040  *    documentation and/or other materials provided with the distribution.
0041  *
0042  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
0043  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
0044  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
0045  * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
0046  * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
0047  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
0048  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
0049  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
0050  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
0051  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
0052  * POSSIBILITY OF SUCH DAMAGE.
0053  */
0054 
0055 #ifndef LIBBSP_M68K_GENMCF548X_BSP_H
0056 #define LIBBSP_M68K_GENMCF548X_BSP_H
0057 
0058 #include <bspopts.h>
0059 #include <bsp/default-initial-extension.h>
0060 
0061 /**
0062  * @defgroup RTEMSBSPsM68kGenMCF548X MCF548X
0063  *
0064  * @ingroup RTEMSBSPsM68k
0065  *
0066  * @brief MCF548X Board Support Package.
0067  *
0068  * @{
0069  */
0070 
0071 #include <rtems.h>
0072 #include <rtems/bspIo.h>
0073 
0074 /***************************************************************************/
0075 /**  Hardware data structure headers                                      **/
0076 #include <mcf548x/mcf548x.h>
0077 
0078 #ifdef __cplusplus
0079 extern "C" {
0080 #endif
0081 
0082 /***************************************************************************/
0083 /**  User Definable configuration                                         **/
0084 
0085 /* define which port the console should use - all other ports are then defined as general purpose */
0086 #define CONSOLE_PORT        0
0087 
0088 /* functions */
0089 
0090 uint32_t get_CPU_clock_speed(void);
0091 
0092 rtems_isr_entry set_vector(
0093   rtems_isr_entry     handler,
0094   rtems_vector_number vector,
0095   int                 type
0096 );
0097 
0098 /* Initial values for the interrupt level and priority registers (INTC_ICRn) */
0099 extern const uint8_t mcf548x_intc_icr_init_values[64];
0100 
0101 /*
0102  * Network driver configuration
0103  */
0104 struct rtems_bsdnet_ifconfig;
0105 extern int rtems_mcf548x_fec_driver_attach_detach(struct rtems_bsdnet_ifconfig *config,int attaching);
0106 #define RTEMS_BSP_NETWORK_DRIVER_ATTACH rtems_mcf548x_fec_driver_attach_detach
0107 
0108 #define RTEMS_BSP_NETWORK_DRIVER_NAME   "fec1"
0109 #define RTEMS_BSP_NETWORK_DRIVER_NAME2  "fec2"
0110 
0111 #ifdef HAS_DBUG
0112   typedef struct {
0113     uint32_t console_baudrate;
0114     uint8_t  server_ip [4];
0115     uint8_t  client_ip [4];
0116     uint8_t  gateway_ip[4];
0117     uint8_t  netmask   [4];
0118     uint8_t  spare[4];
0119     uint8_t  macaddr   [6];
0120     uint32_t ethport;   /* default fec port: 1 = fec1, 2 = fec2 */
0121     uint32_t uartport;  /* default fec port: 1 = psc0, 2 = psc1... */    
0122   } dbug_settings_t;
0123   
0124 #define DBUG_SETTINGS (*(const dbug_settings_t *)0xFC020000)
0125 #endif /* HAS_DBUG */
0126 
0127 void bsp_cacr_set_flags(uint32_t flags);
0128 
0129 void bsp_cacr_set_self_clear_flags(uint32_t flags);
0130 
0131 void bsp_cacr_clear_flags(uint32_t flags);
0132 
0133 #ifdef __cplusplus
0134 }
0135 #endif
0136 
0137 /** @} */
0138 
0139 #endif