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File indexing completed on 2025-05-11 08:23:45
0001 /* 0002 * Use TIMER 1 and TIMER 2 for Timing Test Suite 0003 * The hardware on the MC68360 makes these routines very simple. 0004 * 0005 * NOTE: It is important that the timer start/stop overhead be 0006 * determined when porting or modifying this code. 0007 * 0008 */ 0009 0010 /* 0011 * Based on the `gen68302' board support package, and covered by the 0012 * original distribution terms. 0013 * 0014 * Copyright (c) 1996 Eric Norum <eric@norum.ca> 0015 * 0016 * COPYRIGHT (c) 1989-1999. 0017 * On-Line Applications Research Corporation (OAR). 0018 * 0019 * The license and distribution terms for this file may be 0020 * found in the file LICENSE in this distribution or at 0021 * http://www.rtems.org/license/LICENSE. 0022 */ 0023 0024 #include <rtems.h> 0025 #include <rtems/btimer.h> 0026 #include <bsp.h> 0027 #include <rtems/m68k/m68360.h> 0028 0029 void 0030 benchmark_timer_initialize (void) 0031 { 0032 /* 0033 * Reset timers 1 and 2 0034 */ 0035 m360.tgcr &= ~0x00FF; 0036 m360.tcn1 = 0; 0037 m360.tcn2 = 0; 0038 m360.ter1 = 0xFFFF; 0039 m360.ter2 = 0xFFFF; 0040 0041 /* 0042 * Cascade timers 1 and 2 0043 */ 0044 m360.tgcr |= 0x0080; 0045 0046 /* 0047 * Configure timers 1 and 2 to a single 32-bit, 1 MHz timer. 0048 * HARDWARE: 0049 * Change the `25' to match your processor clock 0050 */ 0051 m360.tmr2 = ((25-1) << 8) | 0x2; 0052 m360.tmr1 = 0; 0053 0054 /* 0055 * Start the timers 0056 */ 0057 m360.tgcr |= 0x0011; 0058 } 0059 0060 /* 0061 * Return timer value in microsecond units 0062 */ 0063 uint32_t 0064 benchmark_timer_read (void) 0065 { 0066 unsigned short val; 0067 0068 val = m360.tcn1; 0069 return val; 0070 } 0071 0072 void 0073 benchmark_timer_disable_subtracting_average_overhead(bool find_flag) 0074 { 0075 }
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