gen68340/include/m340timer.h

0001 /* SPDX-License-Identifier: BSD-2-Clause */
0002
0003 /**
0004  * @file
0005  *
0006  * @ingroup m68k_gen68340
0007  *
0008  * @brief Time driver definitions.
0009  */
0010
0011 /*
0012  *  Header file for timer driver
0013  *  defines for accessing M68340 timer registers
0014  *
0015  *  Author:
0016  *  Geoffroy Montel
0017  *  France Telecom - CNET/DSM/TAM/CAT
0018  *  4, rue du Clos Courtel
0019  *  35512 CESSON-SEVIGNE
0020  *  FRANCE
0021  *
0022  *  e-mail: g_montel@yahoo.com
0023  *
0024  *  COPYRIGHT (c) 1989-1999.
0025  *  On-Line Applications Research Corporation (OAR).
0026  *
0027  * Redistribution and use in source and binary forms, with or without
0028  * modification, are permitted provided that the following conditions
0029  * are met:
0030  * 1. Redistributions of source code must retain the above copyright
0031  *    notice, this list of conditions and the following disclaimer.
0032  * 2. Redistributions in binary form must reproduce the above copyright
0033  *    notice, this list of conditions and the following disclaimer in the
0034  *    documentation and/or other materials provided with the distribution.
0035  *
0036  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
0037  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
0038  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
0039  * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
0040  * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
0041  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
0042  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
0043  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
0044  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
0045  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
0046  * POSSIBILITY OF SUCH DAMAGE.
0047  */
0048
0049 #ifndef __m340timer_H__
0050 #define __m340timer_H__
0051
0052 extern void Fifo_Full_benchmark_timer_initialize (void);
0053
0054 extern void (*Restart_Fifo_Full_A_Timer)(void);
0055 extern void (*Restart_Check_A_Timer)(void);
0056 extern void (*Restart_Fifo_Full_B_Timer)(void);
0057 extern void (*Restart_Check_B_Timer)(void);
0058
0059 /*  CR */
0060 #define m340_SWR        (1<<15)
0061 #define m340_Polling_Mode   (0<<12)
0062 #define m340_TC_Enabled     (1<<12)
0063 #define m340_TG_Enabled     (2<<12)
0064 #define m340_TG_TC_Enabled  (3<<12)
0065 #define m340_TO_Enabled     (4<<12)
0066 #define m340_TO_TC_Enabled  (5<<12)
0067 #define m340_TG_TG_Enabled  (6<<12)
0068 #define m340_TO_TG_TG_Enabled   (7<<12)
0069 #define m340_TGE        (1<<11)
0070 #define m340_PSE        (1<<10)
0071 #define m340_CPE        (1<<9)
0072 #define m340_CLK        (1<<8)
0073 #define m340_Divide_by_2    (1<<5)
0074 #define m340_Divide_by_4    (2<<5)
0075 #define m340_Divide_by_8    (3<<5)
0076 #define m340_Divide_by_16   (4<<5)
0077 #define m340_Divide_by_32   (5<<5)
0078 #define m340_Divide_by_64   (6<<5)
0079 #define m340_Divide_by_128  (7<<5)
0080 #define m340_Divide_by_256  (0<<5)
0081 #define m340_ICOC       (0<<2)
0082 #define m340_SWG        (1<<2)
0083 #define m340_VDCSWG     (2<<2)
0084 #define m340_VWSSPG     (3<<2)
0085 #define m340_PWM        (4<<2)
0086 #define m340_PM         (5<<2)
0087 #define m340_EC         (6<<2)
0088 #define m340_TB         (7<<2)
0089 #define m340_Disabled       0
0090 #define m340_Toggle_Mode    1
0091 #define m340_Zero_Mode      2
0092 #define m340_One_Mode       3
0093
0094 /*  SR */
0095 #define m340_IRQ        (1<<15)
0096 #define m340_TO         (1<<14)
0097 #define m340_TG         (1<<13)
0098 #define m340_TC         (1<<12)
0099 #define m340_TGL        (1<<11)
0100 #define m340_ON         (1<<10)
0101 #define m340_OUT        (1<<9)
0102 #define m340_COM        (1<<8)
0103
0104 #endif