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File indexing completed on 2025-05-11 08:23:43

0001 /**
0002  *  @file
0003  *  
0004  */
0005 
0006 /*
0007  *  COPYRIGHT (c) 1998 by Radstone Technology
0008  *
0009  *
0010  *  THIS FILE IS PROVIDED TO YOU, THE USER, "AS IS", WITHOUT WARRANTY OF ANY
0011  *  KIND, EITHER EXPRESSED OR IMPLIED, INCLUDING, BUT NOT LIMITED TO, THE
0012  *  IMPLIED WARRANTY OF FITNESS FOR A PARTICULAR PURPOSE. THE ENTIRE RISK
0013  *  AS TO THE QUALITY AND PERFORMANCE OF ALL CODE IN THIS FILE IS WITH YOU.
0014  *
0015  *  You are hereby granted permission to use, copy, modify, and distribute
0016  *  this file, provided that this notice, plus the above copyright notice
0017  *  and disclaimer, appears in all copies. Radstone Technology will provide
0018  *  no support for this code.
0019  *
0020  *  COPYRIGHT (c) 1989-2012.
0021  *  On-Line Applications Research Corporation (OAR).
0022  *
0023  *  The license and distribution terms for this file may be
0024  *  found in the file LICENSE in this distribution or at
0025  *  http://www.rtems.org/license/LICENSE.
0026  */
0027 
0028 #ifndef _NS16550_P_H_
0029 #define _NS16550_P_H_
0030 
0031 #ifndef ASM
0032 #include <libchip/serial.h>
0033 #endif
0034 
0035 #ifdef __cplusplus
0036 extern "C" {
0037 #endif
0038 
0039 /*
0040  *  Define NS16550_STATIC to nothing while debugging so the entry points
0041  *  will show up in the symbol table.
0042  */
0043 
0044 #define NS16550_STATIC static
0045 
0046 #define NS16550_RECEIVE_BUFFER   0
0047 #define NS16550_TRANSMIT_BUFFER  0
0048 #define NS16550_DIVISOR_LATCH_L  0
0049 #define NS16550_INTERRUPT_ENABLE 1
0050 #define NS16550_DIVISOR_LATCH_M  1
0051 #define NS16550_INTERRUPT_ID     2
0052 #define NS16550_FIFO_CONTROL     2
0053 #define NS16550_LINE_CONTROL     3
0054 #define NS16550_MODEM_CONTROL    4
0055 #define NS16550_LINE_STATUS      5
0056 #define NS16550_MODEM_STATUS     6
0057 #define NS16550_SCRATCH_PAD      7
0058 #define NS16550_FRACTIONAL_DIVIDER 10
0059 
0060 /*
0061  * Define serial port interrupt enable register structure.
0062  */
0063 
0064 #define SP_INT_RX_ENABLE  0x01
0065 #define SP_INT_TX_ENABLE  0x02
0066 #define SP_INT_LS_ENABLE  0x04
0067 #define SP_INT_MS_ENABLE  0x08
0068 
0069 #define NS16550_ENABLE_ALL_INTR           (SP_INT_RX_ENABLE | SP_INT_TX_ENABLE)
0070 #define NS16550_DISABLE_ALL_INTR          0x00
0071 #define NS16550_ENABLE_ALL_INTR_EXCEPT_TX (SP_INT_RX_ENABLE)
0072 
0073 /*
0074  * Define serial port interrupt ID register structure.
0075  */
0076 
0077 #define SP_IID_0 0x01
0078 #define SP_IID_1 0x02
0079 #define SP_IID_2 0x04
0080 #define SP_IID_3 0x08
0081 
0082 /*
0083  * Define serial port fifo control register structure.
0084  */
0085 
0086 #define SP_FIFO_ENABLE  0x01
0087 #define SP_FIFO_RXRST 0x02
0088 #define SP_FIFO_TXRST 0x04
0089 #define SP_FIFO_DMA   0x08
0090 #define SP_FIFO_RXLEVEL 0xc0
0091 
0092 #define SP_FIFO_SIZE 16
0093 
0094 /*
0095  * Define serial port line control register structure.
0096  */
0097 
0098 #define SP_LINE_SIZE  0x03
0099 #define SP_LINE_STOP  0x04
0100 #define SP_LINE_PAR   0x08
0101 #define SP_LINE_ODD   0x10
0102 #define SP_LINE_STICK 0x20
0103 #define SP_LINE_BREAK 0x40
0104 #define SP_LINE_DLAB  0x80
0105 
0106 /*
0107  * Line status register character size definitions.
0108  */
0109 
0110 #define FIVE_BITS 0x0                   /* five bits per character */
0111 #define SIX_BITS 0x1                    /* six bits per character */
0112 #define SEVEN_BITS 0x2                  /* seven bits per character */
0113 #define EIGHT_BITS 0x3                  /* eight bits per character */
0114 
0115 /*
0116  * Define serial port modem control register structure.
0117  */
0118 
0119 #define SP_MODEM_DTR  0x01
0120 #define SP_MODEM_RTS  0x02
0121 #define SP_MODEM_IRQ  0x08
0122 #define SP_MODEM_LOOP 0x10
0123 #define SP_MODEM_DIV4 0x80
0124 
0125 /*
0126  * Define serial port line status register structure.
0127  */
0128 
0129 #define SP_LSR_RDY    0x01
0130 #define SP_LSR_EOVRUN 0x02
0131 #define SP_LSR_EPAR   0x04
0132 #define SP_LSR_EFRAME 0x08
0133 #define SP_LSR_BREAK  0x10
0134 #define SP_LSR_THOLD  0x20
0135 #define SP_LSR_TX   0x40
0136 #define SP_LSR_EFIFO  0x80
0137 
0138 #ifdef __cplusplus
0139 }
0140 #endif
0141 
0142 #endif /* _NS16550_P_H_ */