include/libchip/ide_ctrl_io.h

0001 /*
0002  * ide_ctrl_io.h
0003  *
0004  * LibChip library IDE controller header file - IO operations defined for
0005  * IDE controllers.
0006  *
0007  * Copyright (C) 2002 OKTET Ltd., St.-Petersburg, Russia
0008  * Author: Eugeny S. Mints <Eugeny.Mints@oktet.ru>
0009  *
0010  * The license and distribution terms for this file may be
0011  * found in the file LICENSE in this distribution or at
0012  * http://www.rtems.org/license/LICENSE.
0013  */
0014 #ifndef __IDE_CTRL_IO_H__
0015 #define __IDE_CTRL_IO_H__
0016
0017 #ifdef __cplusplus
0018 extern "C" {
0019 #endif
0020
0021 #include <rtems/blkdev.h>
0022
0023 /* Command Block Registers */
0024 #define IDE_REGISTER_DATA               0
0025 #define IDE_REGISTER_ERROR              1
0026 #define IDE_REGISTER_FEATURES           IDE_REGISTER_ERROR
0027 #define IDE_REGISTER_SECTOR_COUNT       2
0028 #define IDE_REGISTER_SECTOR_NUMBER      3
0029 #define IDE_REGISTER_LBA0               IDE_REGISTER_SECTOR_NUMBER
0030 #define IDE_REGISTER_CYLINDER_LOW       4
0031 #define IDE_REGISTER_LBA1               IDE_REGISTER_CYLINDER_LOW
0032 #define IDE_REGISTER_CYLINDER_HIGH      5
0033 #define IDE_REGISTER_LBA2               IDE_REGISTER_CYLINDER_HIGH
0034 #define IDE_REGISTER_DEVICE_HEAD        6
0035 #define IDE_REGISTER_LBA3               IDE_REGISTER_DEVICE_HEAD
0036 #define IDE_REGISTER_STATUS             7
0037 #define IDE_REGISTER_COMMAND            IDE_REGISTER_STATUS
0038
0039 /*  Control Block Registers */
0040 #define IDE_REGISTER_ALTERNATE_STATUS   6
0041 #define IDE_REGISTER_DEVICE_CONTROL     IDE_REGISTER_ALTERNATE_STATUS
0042
0043 /* offsets used to access  registers */
0044 #define IDE_REGISTER_DEVICE_CONTROL_OFFSET   8
0045 #define IDE_REGISTER_ALTERNATE_STATUS_OFFSET IDE_REGISTER_DEVICE_CONTROL_OFFSET
0046 #define IDE_REGISTER_DATA_BYTE               9
0047 #define IDE_REGISTER_DATA_WORD               10
0048
0049 /*
0050  * Registers bits
0051  */
0052 #define IDE_REGISTER_STATUS_BSY          0x80  /* Busy bit */
0053 #define IDE_REGISTER_STATUS_DRDY         0x40  /* Device ready */
0054 #define IDE_REGISTER_STATUS_DF           0x20  /* Device fault */
0055 #define IDE_REGISTER_STATUS_DSC          0x10  /* Device seek complete-- */
0056                                                /* obsolete */
0057 #define IDE_REGISTER_STATUS_DRQ          0x08  /* Data request */
0058 #define IDE_REGISTER_STATUS_CORR         0x04  /* Corrected data-- */
0059                                                /* vendor specific--obsolete */
0060 #define IDE_REGISTER_STATUS_IDX          0x02  /* Index-- */
0061                                                 /* vendor specific--obsolete */
0062 #define IDE_REGISTER_STATUS_ERR          0x01  /* Error */
0063
0064 #define IDE_REGISTER_DEVICE_CONTROL_SRST 0x04  /* Host software reset bit */
0065 #define IDE_REGISTER_DEVICE_CONTROL_nIEN 0x02  /* Negated interrupt enable */
0066
0067 #define IDE_REGISTER_DEVICE_HEAD_L       0x40  /* LBA mode bit */
0068 #define IDE_REGISTER_DEVICE_HEAD_DEV     0x10  /* Device0/Device1 bit */
0069 #define IDE_REGISTER_DEVICE_HEAD_DEV_POS 4     /* Dev0/Dev1 bit position */
0070 #define IDE_REGISTER_DEVICE_HEAD_HS      0x0f  /* Head/LBA24_27 bits */
0071 #define IDE_REGISTER_LBA3_L              0x40
0072 #define IDE_REGISTER_LBA3_DEV            0x10
0073 #define IDE_REGISTER_LBA3_LBA            0x0f
0074
0075 #define IDE_REGISTER_ERROR_ICRC          (1 << 7) /* Interface CRC error on */
0076                                                   /* UDMA data transfer */
0077 #define IDE_REGISTER_ERROR_UNC           (1 << 6) /* Uncorrectable data error */
0078 #if CCJ_COULD_NOT_FIND_THIS_ERROR
0079 #define IDE_REGISTER_ERROR_WP            (1 << 6) /* Write protect */
0080 #endif
0081 #define IDE_REGISTER_ERROR_MC            (1 << 5) /* Media changed */
0082 #define IDE_REGISTER_ERROR_IDNF          (1 << 4) /* Sector ID not found */
0083 #define IDE_REGISTER_ERROR_MCR           (1 << 3) /* Media change requested */
0084                                                   /* obsolette */
0085 #define IDE_REGISTER_ERROR_ABRT          (1 << 2) /* Aborted command */
0086 #define IDE_REGISTER_ERROR_NM            (1 << 1) /* No media, End of Media. */
0087 #define IDE_REGISTER_ERROR_AMNF          (1 << 0) /* Address mark not found */
0088                                                   /* --obsolette in ATA-4 */
0089 #define IDE_REGISTER_ERROR_MED           (1 << 0) /* Media error is detected */
0090
0091 /*
0092  * ide_controller_read_data_block --
0093  *     Read data block via controller's data register
0094  *
0095  * PARAMETERS:
0096  *     minor      - minor number of controller
0097  *     block_size - number of bytes to read
0098  *     bufs       - set of buffers to store data
0099  *     cbuf       - number of current buffer from the set
0100  *     pos        - position inside current buffer 'cbuf'
0101  *
0102  * RETURNS:
0103  *     NONE
0104  */
0105 void
0106 ide_controller_read_data_block(rtems_device_minor_number  minor,
0107                                uint32_t                   block_size,
0108                                rtems_blkdev_sg_buffer    *bufs,
0109                                uint32_t                  *cbuf,
0110                                uint32_t                  *pos);
0111
0112 /*
0113  * ide_controller_write_data_block --
0114  *     Write data block via controller's data register
0115  *
0116  * PARAMETERS:
0117  *     minor      - minor number of controller
0118  *     block_size - number of bytes to write
0119  *     bufs       - set of buffers which store data
0120  *     cbuf       - number of current buffer from the set
0121  *     pos        - position inside current buffer 'cbuf'
0122  *
0123  * RETURNS:
0124  *     NONE
0125  */
0126 void
0127 ide_controller_write_data_block(rtems_device_minor_number  minor,
0128                                 uint32_t                   block_size,
0129                                 rtems_blkdev_sg_buffer    *bufs,
0130                                 uint32_t                  *cbuf,
0131                                 uint32_t                  *pos);
0132
0133 /*
0134  * ide_controller_read_register --
0135  *     Read controller's register
0136  *
0137  * PARAMETERS:
0138  *     minor - minor number of controller
0139  *     reg   - register to read
0140  *     value - placeholder for result
0141  *
0142  * RETURNS
0143  *     NONE
0144  */
0145 void
0146 ide_controller_read_register(rtems_device_minor_number  minor,
0147                              int                        reg,
0148                              uint16_t                  *value);
0149
0150 /*
0151  * ide_controller_write_register --
0152  *     Write controller's register
0153  *
0154  * PARAMETERS:
0155  *     minor - minor number of controller
0156  *     reg   - register to write
0157  *     value - value to write
0158  *
0159  * RETURNS:
0160  *     NONE
0161  */
0162 void
0163 ide_controller_write_register(rtems_device_minor_number minor,
0164                               int reg, uint16_t   value);
0165
0166 /*
0167  * ide_controller_config_io_speed --
0168  *     Set controller's speed of IO operations
0169  *
0170  * PARAMETERS:
0171  *     minor           - minor number of controller
0172  *     modes_available - speeds available
0173  *
0174  * RETURNS:
0175  *     RTEMS_SUCCESSFUL on success, or error code if
0176  *     error occured
0177  */
0178 rtems_status_code
0179 ide_controller_config_io_speed(int minor, uint16_t modes_available);
0180
0181 #ifdef __cplusplus
0182 }
0183 #endif
0184
0185
0186 #endif /* __IDE_CTRL_IO_H__ */