Back to home page

LXR

 
 

    


File indexing completed on 2025-05-11 08:23:43

0001 /* SPDX-License-Identifier: BSD-2-Clause */
0002 
0003 /**
0004  * @file
0005  *
0006  * @ingroup RTEMSDeviceGRLIBSPWPNP
0007  *
0008  * @brief This header file defines the SPWPNP register block interface.
0009  */
0010 
0011 /*
0012  * Copyright (C) 2021 embedded brains GmbH & Co. KG
0013  *
0014  * Redistribution and use in source and binary forms, with or without
0015  * modification, are permitted provided that the following conditions
0016  * are met:
0017  * 1. Redistributions of source code must retain the above copyright
0018  *    notice, this list of conditions and the following disclaimer.
0019  * 2. Redistributions in binary form must reproduce the above copyright
0020  *    notice, this list of conditions and the following disclaimer in the
0021  *    documentation and/or other materials provided with the distribution.
0022  *
0023  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
0024  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
0025  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
0026  * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
0027  * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
0028  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
0029  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
0030  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
0031  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
0032  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
0033  * POSSIBILITY OF SUCH DAMAGE.
0034  */
0035 
0036 /*
0037  * This file is part of the RTEMS quality process and was automatically
0038  * generated.  If you find something that needs to be fixed or
0039  * worded better please post a report or patch to an RTEMS mailing list
0040  * or raise a bug report:
0041  *
0042  * https://www.rtems.org/bugs.html
0043  *
0044  * For information on updating and regenerating please refer to the How-To
0045  * section in the Software Requirements Engineering chapter of the
0046  * RTEMS Software Engineering manual.  The manual is provided as a part of
0047  * a release.  For development sources please refer to the online
0048  * documentation at:
0049  *
0050  * https://docs.rtems.org
0051  */
0052 
0053 /* Generated from spec:/dev/grlib/if/spwpnp-header */
0054 
0055 #ifndef _GRLIB_SPWPNP_REGS_H
0056 #define _GRLIB_SPWPNP_REGS_H
0057 
0058 #include <stdint.h>
0059 
0060 #ifdef __cplusplus
0061 extern "C" {
0062 #endif
0063 
0064 /* Generated from spec:/dev/grlib/if/spwpnp */
0065 
0066 /**
0067  * @defgroup RTEMSDeviceGRLIBSPWPNP SpaceWire Plug-and-Play
0068  *
0069  * @ingroup RTEMSDeviceGRLIB
0070  *
0071  * @brief This group contains the SpaceWire Plug-and-Play interfaces.
0072  *
0073  * @{
0074  */
0075 
0076 /**
0077  * @defgroup RTEMSDeviceGRLIBSPWPNPPNPVEND \
0078  *   SpaceWire Plug-and-Play - Device Vendor and Product ID (PNPVEND)
0079  *
0080  * @brief This group contains register bit definitions.
0081  *
0082  * @{
0083  */
0084 
0085 #define SPWPNP_PNPVEND_VEND_SHIFT 16
0086 #define SPWPNP_PNPVEND_VEND_MASK 0xffff0000U
0087 #define SPWPNP_PNPVEND_VEND_GET( _reg ) \
0088   ( ( ( _reg ) & SPWPNP_PNPVEND_VEND_MASK ) >> \
0089     SPWPNP_PNPVEND_VEND_SHIFT )
0090 #define SPWPNP_PNPVEND_VEND_SET( _reg, _val ) \
0091   ( ( ( _reg ) & ~SPWPNP_PNPVEND_VEND_MASK ) | \
0092     ( ( ( _val ) << SPWPNP_PNPVEND_VEND_SHIFT ) & \
0093       SPWPNP_PNPVEND_VEND_MASK ) )
0094 #define SPWPNP_PNPVEND_VEND( _val ) \
0095   ( ( ( _val ) << SPWPNP_PNPVEND_VEND_SHIFT ) & \
0096     SPWPNP_PNPVEND_VEND_MASK )
0097 
0098 #define SPWPNP_PNPVEND_PROD_SHIFT 0
0099 #define SPWPNP_PNPVEND_PROD_MASK 0xffffU
0100 #define SPWPNP_PNPVEND_PROD_GET( _reg ) \
0101   ( ( ( _reg ) & SPWPNP_PNPVEND_PROD_MASK ) >> \
0102     SPWPNP_PNPVEND_PROD_SHIFT )
0103 #define SPWPNP_PNPVEND_PROD_SET( _reg, _val ) \
0104   ( ( ( _reg ) & ~SPWPNP_PNPVEND_PROD_MASK ) | \
0105     ( ( ( _val ) << SPWPNP_PNPVEND_PROD_SHIFT ) & \
0106       SPWPNP_PNPVEND_PROD_MASK ) )
0107 #define SPWPNP_PNPVEND_PROD( _val ) \
0108   ( ( ( _val ) << SPWPNP_PNPVEND_PROD_SHIFT ) & \
0109     SPWPNP_PNPVEND_PROD_MASK )
0110 
0111 /** @} */
0112 
0113 /**
0114  * @defgroup RTEMSDeviceGRLIBSPWPNPPNPVER \
0115  *   SpaceWire Plug-and-Play - Version (PNPVER)
0116  *
0117  * @brief This group contains register bit definitions.
0118  *
0119  * @{
0120  */
0121 
0122 #define SPWPNP_PNPVER_MAJOR_SHIFT 24
0123 #define SPWPNP_PNPVER_MAJOR_MASK 0xff000000U
0124 #define SPWPNP_PNPVER_MAJOR_GET( _reg ) \
0125   ( ( ( _reg ) & SPWPNP_PNPVER_MAJOR_MASK ) >> \
0126     SPWPNP_PNPVER_MAJOR_SHIFT )
0127 #define SPWPNP_PNPVER_MAJOR_SET( _reg, _val ) \
0128   ( ( ( _reg ) & ~SPWPNP_PNPVER_MAJOR_MASK ) | \
0129     ( ( ( _val ) << SPWPNP_PNPVER_MAJOR_SHIFT ) & \
0130       SPWPNP_PNPVER_MAJOR_MASK ) )
0131 #define SPWPNP_PNPVER_MAJOR( _val ) \
0132   ( ( ( _val ) << SPWPNP_PNPVER_MAJOR_SHIFT ) & \
0133     SPWPNP_PNPVER_MAJOR_MASK )
0134 
0135 #define SPWPNP_PNPVER_MINOR_SHIFT 16
0136 #define SPWPNP_PNPVER_MINOR_MASK 0xff0000U
0137 #define SPWPNP_PNPVER_MINOR_GET( _reg ) \
0138   ( ( ( _reg ) & SPWPNP_PNPVER_MINOR_MASK ) >> \
0139     SPWPNP_PNPVER_MINOR_SHIFT )
0140 #define SPWPNP_PNPVER_MINOR_SET( _reg, _val ) \
0141   ( ( ( _reg ) & ~SPWPNP_PNPVER_MINOR_MASK ) | \
0142     ( ( ( _val ) << SPWPNP_PNPVER_MINOR_SHIFT ) & \
0143       SPWPNP_PNPVER_MINOR_MASK ) )
0144 #define SPWPNP_PNPVER_MINOR( _val ) \
0145   ( ( ( _val ) << SPWPNP_PNPVER_MINOR_SHIFT ) & \
0146     SPWPNP_PNPVER_MINOR_MASK )
0147 
0148 #define SPWPNP_PNPVER_PATCH_SHIFT 8
0149 #define SPWPNP_PNPVER_PATCH_MASK 0xff00U
0150 #define SPWPNP_PNPVER_PATCH_GET( _reg ) \
0151   ( ( ( _reg ) & SPWPNP_PNPVER_PATCH_MASK ) >> \
0152     SPWPNP_PNPVER_PATCH_SHIFT )
0153 #define SPWPNP_PNPVER_PATCH_SET( _reg, _val ) \
0154   ( ( ( _reg ) & ~SPWPNP_PNPVER_PATCH_MASK ) | \
0155     ( ( ( _val ) << SPWPNP_PNPVER_PATCH_SHIFT ) & \
0156       SPWPNP_PNPVER_PATCH_MASK ) )
0157 #define SPWPNP_PNPVER_PATCH( _val ) \
0158   ( ( ( _val ) << SPWPNP_PNPVER_PATCH_SHIFT ) & \
0159     SPWPNP_PNPVER_PATCH_MASK )
0160 
0161 /** @} */
0162 
0163 /**
0164  * @defgroup RTEMSDeviceGRLIBSPWPNPPNPDEVSTS \
0165  *   SpaceWire Plug-and-Play - Device Status (PNPDEVSTS)
0166  *
0167  * @brief This group contains register bit definitions.
0168  *
0169  * @{
0170  */
0171 
0172 #define SPWPNP_PNPDEVSTS_STATUS_SHIFT 0
0173 #define SPWPNP_PNPDEVSTS_STATUS_MASK 0xffU
0174 #define SPWPNP_PNPDEVSTS_STATUS_GET( _reg ) \
0175   ( ( ( _reg ) & SPWPNP_PNPDEVSTS_STATUS_MASK ) >> \
0176     SPWPNP_PNPDEVSTS_STATUS_SHIFT )
0177 #define SPWPNP_PNPDEVSTS_STATUS_SET( _reg, _val ) \
0178   ( ( ( _reg ) & ~SPWPNP_PNPDEVSTS_STATUS_MASK ) | \
0179     ( ( ( _val ) << SPWPNP_PNPDEVSTS_STATUS_SHIFT ) & \
0180       SPWPNP_PNPDEVSTS_STATUS_MASK ) )
0181 #define SPWPNP_PNPDEVSTS_STATUS( _val ) \
0182   ( ( ( _val ) << SPWPNP_PNPDEVSTS_STATUS_SHIFT ) & \
0183     SPWPNP_PNPDEVSTS_STATUS_MASK )
0184 
0185 /** @} */
0186 
0187 /**
0188  * @defgroup RTEMSDeviceGRLIBSPWPNPPNPACTLNK \
0189  *   SpaceWire Plug-and-Play - Active Links (PNPACTLNK)
0190  *
0191  * @brief This group contains register bit definitions.
0192  *
0193  * @{
0194  */
0195 
0196 #define SPWPNP_PNPACTLNK_ACTIVE_SHIFT 1
0197 #define SPWPNP_PNPACTLNK_ACTIVE_MASK 0xfffffffeU
0198 #define SPWPNP_PNPACTLNK_ACTIVE_GET( _reg ) \
0199   ( ( ( _reg ) & SPWPNP_PNPACTLNK_ACTIVE_MASK ) >> \
0200     SPWPNP_PNPACTLNK_ACTIVE_SHIFT )
0201 #define SPWPNP_PNPACTLNK_ACTIVE_SET( _reg, _val ) \
0202   ( ( ( _reg ) & ~SPWPNP_PNPACTLNK_ACTIVE_MASK ) | \
0203     ( ( ( _val ) << SPWPNP_PNPACTLNK_ACTIVE_SHIFT ) & \
0204       SPWPNP_PNPACTLNK_ACTIVE_MASK ) )
0205 #define SPWPNP_PNPACTLNK_ACTIVE( _val ) \
0206   ( ( ( _val ) << SPWPNP_PNPACTLNK_ACTIVE_SHIFT ) & \
0207     SPWPNP_PNPACTLNK_ACTIVE_MASK )
0208 
0209 /** @} */
0210 
0211 /**
0212  * @defgroup RTEMSDeviceGRLIBSPWPNPPNPOA0 \
0213  *   SpaceWire Plug-and-Play - Owner Address 0 (PNPOA0)
0214  *
0215  * @brief This group contains register bit definitions.
0216  *
0217  * @{
0218  */
0219 
0220 #define SPWPNP_PNPOA0_RA_SHIFT 0
0221 #define SPWPNP_PNPOA0_RA_MASK 0xffffffffU
0222 #define SPWPNP_PNPOA0_RA_GET( _reg ) \
0223   ( ( ( _reg ) & SPWPNP_PNPOA0_RA_MASK ) >> \
0224     SPWPNP_PNPOA0_RA_SHIFT )
0225 #define SPWPNP_PNPOA0_RA_SET( _reg, _val ) \
0226   ( ( ( _reg ) & ~SPWPNP_PNPOA0_RA_MASK ) | \
0227     ( ( ( _val ) << SPWPNP_PNPOA0_RA_SHIFT ) & \
0228       SPWPNP_PNPOA0_RA_MASK ) )
0229 #define SPWPNP_PNPOA0_RA( _val ) \
0230   ( ( ( _val ) << SPWPNP_PNPOA0_RA_SHIFT ) & \
0231     SPWPNP_PNPOA0_RA_MASK )
0232 
0233 /** @} */
0234 
0235 /**
0236  * @defgroup RTEMSDeviceGRLIBSPWPNPPNPOA1 \
0237  *   SpaceWire Plug-and-Play - Owner Address 1 (PNPOA1)
0238  *
0239  * @brief This group contains register bit definitions.
0240  *
0241  * @{
0242  */
0243 
0244 #define SPWPNP_PNPOA1_RA_SHIFT 0
0245 #define SPWPNP_PNPOA1_RA_MASK 0xffffffffU
0246 #define SPWPNP_PNPOA1_RA_GET( _reg ) \
0247   ( ( ( _reg ) & SPWPNP_PNPOA1_RA_MASK ) >> \
0248     SPWPNP_PNPOA1_RA_SHIFT )
0249 #define SPWPNP_PNPOA1_RA_SET( _reg, _val ) \
0250   ( ( ( _reg ) & ~SPWPNP_PNPOA1_RA_MASK ) | \
0251     ( ( ( _val ) << SPWPNP_PNPOA1_RA_SHIFT ) & \
0252       SPWPNP_PNPOA1_RA_MASK ) )
0253 #define SPWPNP_PNPOA1_RA( _val ) \
0254   ( ( ( _val ) << SPWPNP_PNPOA1_RA_SHIFT ) & \
0255     SPWPNP_PNPOA1_RA_MASK )
0256 
0257 /** @} */
0258 
0259 /**
0260  * @defgroup RTEMSDeviceGRLIBSPWPNPPNPOA2 \
0261  *   SpaceWire Plug-and-Play - Owner Address 2 (PNPOA2)
0262  *
0263  * @brief This group contains register bit definitions.
0264  *
0265  * @{
0266  */
0267 
0268 #define SPWPNP_PNPOA2_RA_SHIFT 0
0269 #define SPWPNP_PNPOA2_RA_MASK 0xffffffffU
0270 #define SPWPNP_PNPOA2_RA_GET( _reg ) \
0271   ( ( ( _reg ) & SPWPNP_PNPOA2_RA_MASK ) >> \
0272     SPWPNP_PNPOA2_RA_SHIFT )
0273 #define SPWPNP_PNPOA2_RA_SET( _reg, _val ) \
0274   ( ( ( _reg ) & ~SPWPNP_PNPOA2_RA_MASK ) | \
0275     ( ( ( _val ) << SPWPNP_PNPOA2_RA_SHIFT ) & \
0276       SPWPNP_PNPOA2_RA_MASK ) )
0277 #define SPWPNP_PNPOA2_RA( _val ) \
0278   ( ( ( _val ) << SPWPNP_PNPOA2_RA_SHIFT ) & \
0279     SPWPNP_PNPOA2_RA_MASK )
0280 
0281 /** @} */
0282 
0283 /**
0284  * @defgroup RTEMSDeviceGRLIBSPWPNPPNPDEVID \
0285  *   SpaceWire Plug-and-Play - Device ID (PNPDEVID)
0286  *
0287  * @brief This group contains register bit definitions.
0288  *
0289  * @{
0290  */
0291 
0292 #define SPWPNP_PNPDEVID_DID_SHIFT 0
0293 #define SPWPNP_PNPDEVID_DID_MASK 0xffffffffU
0294 #define SPWPNP_PNPDEVID_DID_GET( _reg ) \
0295   ( ( ( _reg ) & SPWPNP_PNPDEVID_DID_MASK ) >> \
0296     SPWPNP_PNPDEVID_DID_SHIFT )
0297 #define SPWPNP_PNPDEVID_DID_SET( _reg, _val ) \
0298   ( ( ( _reg ) & ~SPWPNP_PNPDEVID_DID_MASK ) | \
0299     ( ( ( _val ) << SPWPNP_PNPDEVID_DID_SHIFT ) & \
0300       SPWPNP_PNPDEVID_DID_MASK ) )
0301 #define SPWPNP_PNPDEVID_DID( _val ) \
0302   ( ( ( _val ) << SPWPNP_PNPDEVID_DID_SHIFT ) & \
0303     SPWPNP_PNPDEVID_DID_MASK )
0304 
0305 /** @} */
0306 
0307 /**
0308  * @defgroup RTEMSDeviceGRLIBSPWPNPPNPUVEND \
0309  *   SpaceWire Plug-and-Play - Unit Vendor and Product ID (PNPUVEND)
0310  *
0311  * @brief This group contains register bit definitions.
0312  *
0313  * @{
0314  */
0315 
0316 #define SPWPNP_PNPUVEND_VEND_SHIFT 16
0317 #define SPWPNP_PNPUVEND_VEND_MASK 0xffff0000U
0318 #define SPWPNP_PNPUVEND_VEND_GET( _reg ) \
0319   ( ( ( _reg ) & SPWPNP_PNPUVEND_VEND_MASK ) >> \
0320     SPWPNP_PNPUVEND_VEND_SHIFT )
0321 #define SPWPNP_PNPUVEND_VEND_SET( _reg, _val ) \
0322   ( ( ( _reg ) & ~SPWPNP_PNPUVEND_VEND_MASK ) | \
0323     ( ( ( _val ) << SPWPNP_PNPUVEND_VEND_SHIFT ) & \
0324       SPWPNP_PNPUVEND_VEND_MASK ) )
0325 #define SPWPNP_PNPUVEND_VEND( _val ) \
0326   ( ( ( _val ) << SPWPNP_PNPUVEND_VEND_SHIFT ) & \
0327     SPWPNP_PNPUVEND_VEND_MASK )
0328 
0329 #define SPWPNP_PNPUVEND_PROD_SHIFT 0
0330 #define SPWPNP_PNPUVEND_PROD_MASK 0xffffU
0331 #define SPWPNP_PNPUVEND_PROD_GET( _reg ) \
0332   ( ( ( _reg ) & SPWPNP_PNPUVEND_PROD_MASK ) >> \
0333     SPWPNP_PNPUVEND_PROD_SHIFT )
0334 #define SPWPNP_PNPUVEND_PROD_SET( _reg, _val ) \
0335   ( ( ( _reg ) & ~SPWPNP_PNPUVEND_PROD_MASK ) | \
0336     ( ( ( _val ) << SPWPNP_PNPUVEND_PROD_SHIFT ) & \
0337       SPWPNP_PNPUVEND_PROD_MASK ) )
0338 #define SPWPNP_PNPUVEND_PROD( _val ) \
0339   ( ( ( _val ) << SPWPNP_PNPUVEND_PROD_SHIFT ) & \
0340     SPWPNP_PNPUVEND_PROD_MASK )
0341 
0342 /** @} */
0343 
0344 /**
0345  * @defgroup RTEMSDeviceGRLIBSPWPNPPNPUSN \
0346  *   SpaceWire Plug-and-Play - Unit Serial Number (PNPUSN)
0347  *
0348  * @brief This group contains register bit definitions.
0349  *
0350  * @{
0351  */
0352 
0353 #define SPWPNP_PNPUSN_USN_SHIFT 0
0354 #define SPWPNP_PNPUSN_USN_MASK 0xffffffffU
0355 #define SPWPNP_PNPUSN_USN_GET( _reg ) \
0356   ( ( ( _reg ) & SPWPNP_PNPUSN_USN_MASK ) >> \
0357     SPWPNP_PNPUSN_USN_SHIFT )
0358 #define SPWPNP_PNPUSN_USN_SET( _reg, _val ) \
0359   ( ( ( _reg ) & ~SPWPNP_PNPUSN_USN_MASK ) | \
0360     ( ( ( _val ) << SPWPNP_PNPUSN_USN_SHIFT ) & \
0361       SPWPNP_PNPUSN_USN_MASK ) )
0362 #define SPWPNP_PNPUSN_USN( _val ) \
0363   ( ( ( _val ) << SPWPNP_PNPUSN_USN_SHIFT ) & \
0364     SPWPNP_PNPUSN_USN_MASK )
0365 
0366 /** @} */
0367 
0368 /**
0369  * @defgroup RTEMSDeviceGRLIBSPWPNPPNPVSTRL \
0370  *   SpaceWire Plug-and-Play - Vendor String Length (PNPVSTRL)
0371  *
0372  * @brief This group contains register bit definitions.
0373  *
0374  * @{
0375  */
0376 
0377 #define SPWPNP_PNPVSTRL_LEN_SHIFT 0
0378 #define SPWPNP_PNPVSTRL_LEN_MASK 0x7fffU
0379 #define SPWPNP_PNPVSTRL_LEN_GET( _reg ) \
0380   ( ( ( _reg ) & SPWPNP_PNPVSTRL_LEN_MASK ) >> \
0381     SPWPNP_PNPVSTRL_LEN_SHIFT )
0382 #define SPWPNP_PNPVSTRL_LEN_SET( _reg, _val ) \
0383   ( ( ( _reg ) & ~SPWPNP_PNPVSTRL_LEN_MASK ) | \
0384     ( ( ( _val ) << SPWPNP_PNPVSTRL_LEN_SHIFT ) & \
0385       SPWPNP_PNPVSTRL_LEN_MASK ) )
0386 #define SPWPNP_PNPVSTRL_LEN( _val ) \
0387   ( ( ( _val ) << SPWPNP_PNPVSTRL_LEN_SHIFT ) & \
0388     SPWPNP_PNPVSTRL_LEN_MASK )
0389 
0390 /** @} */
0391 
0392 /**
0393  * @defgroup RTEMSDeviceGRLIBSPWPNPPNPPSTRL \
0394  *   SpaceWire Plug-and-Play - Product String Length (PNPPSTRL)
0395  *
0396  * @brief This group contains register bit definitions.
0397  *
0398  * @{
0399  */
0400 
0401 #define SPWPNP_PNPPSTRL_LEN_SHIFT 0
0402 #define SPWPNP_PNPPSTRL_LEN_MASK 0x7fffU
0403 #define SPWPNP_PNPPSTRL_LEN_GET( _reg ) \
0404   ( ( ( _reg ) & SPWPNP_PNPPSTRL_LEN_MASK ) >> \
0405     SPWPNP_PNPPSTRL_LEN_SHIFT )
0406 #define SPWPNP_PNPPSTRL_LEN_SET( _reg, _val ) \
0407   ( ( ( _reg ) & ~SPWPNP_PNPPSTRL_LEN_MASK ) | \
0408     ( ( ( _val ) << SPWPNP_PNPPSTRL_LEN_SHIFT ) & \
0409       SPWPNP_PNPPSTRL_LEN_MASK ) )
0410 #define SPWPNP_PNPPSTRL_LEN( _val ) \
0411   ( ( ( _val ) << SPWPNP_PNPPSTRL_LEN_SHIFT ) & \
0412     SPWPNP_PNPPSTRL_LEN_MASK )
0413 
0414 /** @} */
0415 
0416 /**
0417  * @defgroup RTEMSDeviceGRLIBSPWPNPPNPPCNT \
0418  *   SpaceWire Plug-and-Play - Protocol Count (PNPPCNT)
0419  *
0420  * @brief This group contains register bit definitions.
0421  *
0422  * @{
0423  */
0424 
0425 #define SPWPNP_PNPPCNT_PC_SHIFT 0
0426 #define SPWPNP_PNPPCNT_PC_MASK 0x1fU
0427 #define SPWPNP_PNPPCNT_PC_GET( _reg ) \
0428   ( ( ( _reg ) & SPWPNP_PNPPCNT_PC_MASK ) >> \
0429     SPWPNP_PNPPCNT_PC_SHIFT )
0430 #define SPWPNP_PNPPCNT_PC_SET( _reg, _val ) \
0431   ( ( ( _reg ) & ~SPWPNP_PNPPCNT_PC_MASK ) | \
0432     ( ( ( _val ) << SPWPNP_PNPPCNT_PC_SHIFT ) & \
0433       SPWPNP_PNPPCNT_PC_MASK ) )
0434 #define SPWPNP_PNPPCNT_PC( _val ) \
0435   ( ( ( _val ) << SPWPNP_PNPPCNT_PC_SHIFT ) & \
0436     SPWPNP_PNPPCNT_PC_MASK )
0437 
0438 /** @} */
0439 
0440 /**
0441  * @defgroup RTEMSDeviceGRLIBSPWPNPPNPACNT \
0442  *   SpaceWire Plug-and-Play - Application Count (PNPACNT)
0443  *
0444  * @brief This group contains register bit definitions.
0445  *
0446  * @{
0447  */
0448 
0449 #define SPWPNP_PNPACNT_AC_SHIFT 0
0450 #define SPWPNP_PNPACNT_AC_MASK 0xffU
0451 #define SPWPNP_PNPACNT_AC_GET( _reg ) \
0452   ( ( ( _reg ) & SPWPNP_PNPACNT_AC_MASK ) >> \
0453     SPWPNP_PNPACNT_AC_SHIFT )
0454 #define SPWPNP_PNPACNT_AC_SET( _reg, _val ) \
0455   ( ( ( _reg ) & ~SPWPNP_PNPACNT_AC_MASK ) | \
0456     ( ( ( _val ) << SPWPNP_PNPACNT_AC_SHIFT ) & \
0457       SPWPNP_PNPACNT_AC_MASK ) )
0458 #define SPWPNP_PNPACNT_AC( _val ) \
0459   ( ( ( _val ) << SPWPNP_PNPACNT_AC_SHIFT ) & \
0460     SPWPNP_PNPACNT_AC_MASK )
0461 
0462 /** @} */
0463 
0464 /**
0465  * @brief This set of defines the SpaceWire Plug-and-Play address map.
0466  */
0467 typedef struct spwpnp {
0468   /**
0469    * @brief See @ref RTEMSDeviceGRLIBSPWPNPPNPVEND.
0470    */
0471   uint32_t pnpvend;
0472 
0473   /**
0474    * @brief See @ref RTEMSDeviceGRLIBSPWPNPPNPVER.
0475    */
0476   uint32_t pnpver;
0477 
0478   /**
0479    * @brief See @ref RTEMSDeviceGRLIBSPWPNPPNPDEVSTS.
0480    */
0481   uint32_t pnpdevsts;
0482 
0483   /**
0484    * @brief See @ref RTEMSDeviceGRLIBSPWPNPPNPACTLNK.
0485    */
0486   uint32_t pnpactlnk;
0487 
0488   /**
0489    * @brief See @ref RTEMSDeviceGRLIBSPWPNPPNPOA0.
0490    */
0491   uint32_t pnpoa0;
0492 
0493   /**
0494    * @brief See @ref RTEMSDeviceGRLIBSPWPNPPNPOA1.
0495    */
0496   uint32_t pnpoa1;
0497 
0498   /**
0499    * @brief See @ref RTEMSDeviceGRLIBSPWPNPPNPOA2.
0500    */
0501   uint32_t pnpoa2;
0502 
0503   /**
0504    * @brief See @ref RTEMSDeviceGRLIBSPWPNPPNPDEVID.
0505    */
0506   uint32_t pnpdevid;
0507 
0508   /**
0509    * @brief See @ref RTEMSDeviceGRLIBSPWPNPPNPUVEND.
0510    */
0511   uint32_t pnpuvend;
0512 
0513   /**
0514    * @brief See @ref RTEMSDeviceGRLIBSPWPNPPNPUSN.
0515    */
0516   uint32_t pnpusn;
0517 
0518   uint16_t reserved_e_4000[ 8185 ];
0519 
0520   /**
0521    * @brief See @ref RTEMSDeviceGRLIBSPWPNPPNPVSTRL.
0522    */
0523   uint32_t pnpvstrl;
0524 
0525   uint32_t reserved_4004_6000[ 2047 ];
0526 
0527   /**
0528    * @brief See @ref RTEMSDeviceGRLIBSPWPNPPNPPSTRL.
0529    */
0530   uint32_t pnppstrl;
0531 
0532   uint32_t reserved_6004_8000[ 2047 ];
0533 
0534   /**
0535    * @brief See @ref RTEMSDeviceGRLIBSPWPNPPNPPCNT.
0536    */
0537   uint32_t pnppcnt;
0538 
0539   uint32_t reserved_8004_c000[ 4095 ];
0540 
0541   /**
0542    * @brief See @ref RTEMSDeviceGRLIBSPWPNPPNPACNT.
0543    */
0544   uint32_t pnpacnt;
0545 } spwpnp;
0546 
0547 /** @} */
0548 
0549 #ifdef __cplusplus
0550 }
0551 #endif
0552 
0553 #endif /* _GRLIB_SPWPNP_REGS_H */